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Achieving target performance goals in a cellular-communications network can be challenging because of different tradeoffs. For example, the noncoincidence of noise (Γopt) matching and conjugate S11 * impedance matching requires a tradeoff between input matching and amplifier noise figure. Unfortunately, this tradeoff may not be available in cellular infrastructure equipment such as tower-mounted amplifiers (TMAs) because of aerial matching requirements. For example, to achieve a 14-dB aerial mismatch when a low-noise amplifier (LNA) is preceded by a bandpass filter with 18-dB return loss (assumed to be lossless), the input return loss (IRL) must be better than 23 dB. An isolator can alleviate the high reflectivity in a noise-matched amplifier, but it adds cost, size, and loss.
The balanced amplifier topology developed at Bell Labs in the 1960s1,2 is an effective solution because it channels the energies reflected from a pair of amplifiers to quadrature 3-dB couplers (also known as 90-deg. or hybrid couplers) where self-cancellation can take place. Since the port match will be good regardless of the amplifiers’ actual reflectivity, they can be tuned for minimum noise. Additionally, the balanced configuration has better linearity and bandwidth than its single-ended counterpartand is inherently self-stabilizing; high in-band and out-of-band stability is possible even with two potentially unstable amplifiers.3
Of course, a balanced LNA has a higher parts count and power consumption than a single-ended model. Its quadrature couplers also add cost and printed-circuit-board (PCB) area, and their insertion losses degrade noise performances. If commercial drop-in couplers are used, their RF performances are generally proportional to their size. Furthermore, the confined space atop cellular towers does not favor balanced LNAs because they tend to be larger and heavier than their single-ended counterparts. Previous approaches to reducing balanced LNA size involved shrinking the couplers4,5 and higher circuit integration.6,7 However, a TMA’s needs for high sensitivity and linearity tend to hamper miniaturization.
In pursuit of reduced component count and miniaturization in a balanced 900-MHz LNA, a design was developed with miniature multilayer couplers and a MMIC with integrated dual amplifiers, biasing, and shutdown functions. This may be the first time that this type of shutdown function has been integrated in a dual-amplifier MMIC. What follows will describe the materials and methods used to realize the design (Table 1). The first step in reducing the size of a baanced LNA for UHF cell towers involved the design of a new monolithic microwave integrated circuit (MMIC) that integrates dual amplifiers, electrostatic-discharge (ESD) protection, active bias circuitry, and shutdown functions (Fig. 1).
In addition to reducing the number of required external components, this MMIC combines bias circuitry and the amplifier on the same chip, with the benefit of stablizing the operating current against gate threshold voltage and temperature variations. The chip is fabricated with a 0.25-μm enhancement-mode, pseudomorphic high-electron-mobility-transistor (ePHEMT) process on a 6-in. wafer. The process offers a suitable balance of cost and performance.
The process has been proven previously through the fabrication of a single-ended LNA capable of 0.3-dB noise figure at 900 MHz,8 making it appear that a 0.5-dB noise figure in balanced mode might be possible after factoring in the coupler’s loss. The process’s high transition frequency (fT) of greater than 30 GHz and high peak transconductance of about 615 mS/mm make it possible to reduce the number of gain stages to just one to reach a gain level of 17.6 dB. In addition, the process is suitable for low-voltage operation because its linearity does not degrade appreciably until the drain-source voltage, VDS, falls below 2 V.9 The MMIC, which integrates 6 transistors, 26 diodes, 12 resistors, and 2 capacitors, is epoxy encapsulated in a 16-pin 4 x 4 x 0.85 mm quad flat no-lead (QFN) package.
The active bias circuits are connected to the voltage supplies Vdd1-2 via external resistors R3 and R8. Through these resistors, the gate bias voltages can be controlled by the user. Although each ePHEMT’s nominal drain current, Idd, is 60 mA at a drain voltage, Vdd, of +4.8 VDC, it can be varied from 48 to 72 mA over the usable range of values for these resistors. Inductors L1 and L16 and resistors R1 and R6 serve as the gates’ (pins 1 and 4) bias networks. Although on-chip spiral inductors can perform this function, this design employs external inductors because they have lower losses, the smaller chip is more economical, and the chip can be used at other frequencies.