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Low-noise amplifiers (LNAs) are essential to many communications systems, such as cellular communications networks. Achieving low noise figures requires determining such parameters as the optimum impedance matching points, such as for Gopt and conjugate S*11 impedance matching points, for active devices. Balanced LNAs were developed in the 1960s by finding transistor amplifiers’ noncoinciding noise Gopt and conjugate S*11 matching points,1,2 achieving low mismatches by self-cancellation of the reflected energies in quadrature 3-dB couplers (also known as the 90-deg. or hybrid couplers) employed in the LNA design. By assuring good impedance match, a LNA’s constituent amplifiers can then be tuned for minimum noise.

Although an isolator can perform the same function, the cost is comparatively higher. Additionally, a balanced LNA configuration improves upon the reliability, linearity, and bandwidth of its single-ended counterpart and is inherently self-stabilizing (i.e., high stability, both in-band and out of band, is possible even when it is constructed from two potentially unstable amplifiers).3 However, a balanced LNA needs twice the current and components of its single-ended counterpart.

Furthermore, the quadrature couplers represent an additional cost and occupy substantial printed-circuit-board (PCB) space, especially for distributed implementations, and their insertion losses degrade amplifier noise figure (NF), gain, and output power. If commercial drop-in couplers are used, their RF performance levels are generally proportional to their cost and size. More critically, a balanced LNA’s doubled size and weight diminish its viability as a tower-mounted amplifier (TMA) in confined spaces atop cellular towers.

Three broad approaches to miniaturizing a balanced LNA are (a) shrinking the couplers,4,5  (b) integrating the couplers into the amplifying device monolithically6 or in hybrid form,7 and (c) integrating dual amplifiers in either hybrid form8,9 or monolithic form.10,11 However, TMAs also require cutting-edge performance, and this is an obstacle to miniaturization.

Compact LNA Drives 2.5-GHz Base Stations, Fig. 1

Many TMA-centric balanced LNA designs of the past decade have been based on discrete devices,4,5,12,13 but these require a large number of supporting components. To achieve significant reduction in size and component count, dual amplifiers, biasing, and shutdown functions have been integrated into a monolithic microwave integrated circuit (MMIC) and then combined with miniature couplers to create a high-performance, compact 2.5-GHz balanced LNA. The design’s viability as a TMA is contingent upon meeting a number of critical specifications: a sub-1-dB noise figure, 17.6-dB gain in a single stage, better than 18-dB input match, +30-dBm output third-order intercept point (OIP3), and unconditional stability. This may also be the industry’s first dual-amplifier design with integrated shutdown function.

The compact GaAs MMIC comprises dual amplifiers, electrostatic-discharge (ESD) protection, adjustable active biasing, and shutdown functions (the yellow box in Fig. 1). The proximity of the bias function to the amplifier on the same chip also beneficially stabilizes the operating current against gate threshold voltage and temperature variations. For chip fabrication, a proprietary 0.25-μm enhancement-mode pseudomorphic high-electron-mobility-transistor (ePHEMT) process technology on a 6-in. wafer was selected because it best matches the cost-versus-performance requirements. Because this process technology has previously enabled a single-ended LNA to achieve a 0.7-dB NF at 2.5 GHz,14 a balanced design with sub-1-dB NF was anticipated after factoring in about 0.2-dB coupler loss.

The semiconductor process has relatively high transition frequency (fT) and peak transconductance (greater than 30 GHz and about 615 mS/mm, respectively) which should provide the leverage to meet the target gain with a single amplifier stage. Additionally, this process technology’s stable linearity down to 2 VDC drain-source voltage (VDS)15 is beneficial for a cascode arrangement where each transistor only sees one-half the supply. The MMIC is assembled into a 16-pin 4 × 4 × 0.85 mm quad-flat-no-lead (QFN) package using conventional lead-frame wire bonding technology.

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