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In most RF front ends, a mixer follows an LNA, and should provide high linearity, low noise, and adequate gain to overcome the noise levels of the IF and baseband sections that follow. From a designer’s perspective, the main challenge in active mixer design is optimizing conversion gain, linearity, and NF simultaneously. According to Fig. 2, the mixer’s small-signal gain can be expressed by Eq. 3:

Gain = -gm(RO-NMOS x RO-PMOS)     (3)

and the mixer’s conversion gain (CG) can be expressed by Eq. 4:

CG = (-2/π)gm(RO-NMOS x RO-PMOS)     (4)

where:

VIF = the IF output voltage;

VRF = the RF input voltage;

2/π = the factor for a square-wave LO signal;

gm = the transconductance of the NMOS transistor;

RO-NOMS = the output resistance of the NMOS transistor; and

RO-PMOS = the output resistance of the PMOS transistor.         

Transconductance, gm, can be expressed by Eq. 5:

gm = ∂iD/∂VGS = (KRFID)0.5    (5)

where the process parameter, KRF, can be found from Eq. 6:

KRF = 2μnCOX(W/L)    (6)

where:

ID = the drain current;

KRF = a process parameter; 

μn = the carrier mobility;

COX = the gate-oxide capacitance per unit area;

W = the width of the core transistors (M3 - M6); and

L = the length of the core transistors (M3 - M6).

Drain current ID is set by the tail current transistors (M1, M2). From Eq. 4, it can be seen that the CG is proportional to the transconductance, gm, of the core transistors (M3 - M6). To achieve sufficient transconductance and high CG, a large gate width is required for these transistors. The optimal size of the core transistors is with a gate width of 89 μm and gate length of 0.18 μm.

For a transceiver, particularly in wireless communications systems, linearity is a key performance parameter. The linearity of a system’s mixer will have a significant impact on the overall linearity of the system. The linearity in terms of input-third-order intercept point (IIP3) can be expressed as Eq. 7:

IIP3 = 4[(2/3)(ID/KRF)]0.5   (7)

Equation 7 indicates that an increase in drain current should improve the mixer’s linearity. However, the voltage drop across the active load (M7, M8) is also increased. This in turn reduces the available voltage headroom at the output of the mixer for a fixed supply voltage, thereby deteriorating the overall mixer performance. To achieve acceptable linearity performance with high gain and low noise figure, the proposed mixer consumes approximately 1.02 mA (255 μA) for each of the four core transistors).

Because the bulk-injection technique degrades mixer NF, switched biasing is also used with this mixer to improve its noise performance. Two major mechanisms generate 1/f noise of the switching pairs. One is a direct mechanism, owing to the finite slope of the switching pair transitions. The LO switching generates noise pulse trains by the direct mechanism. The DC average of noise pulse trains is the output flicker-noise current, as described by Eqs. 8 and 913:

io,n(dir) = (4I x Vn/(S x T)    (8)

Vn = [2x( Kf/ WeffLeffCoxf)]0.5     (9)

where:

I = the bias current for the RF transconductance stage;

T = the LO period;

Vn = the equivalent flicker noise of the switching pair;

S = the slope of the LO signal;

Weff = the effective width of the device;

Leff = the effective length of the device;

Cox = the oxide capacitance;

f = the frequency; and

Kf = a process parameter.13

The other mechanism that generates 1/f noise is an indirect mechanism, as flicker noise mainly depends on the tail capacitance of the node between the LO switches and RF transconductance stage.11 When a sinewave LO is applied to the mixer, the average of the output noise current generated by the indirect mechanism is expressed by Eq. 1013:

io,n(ind) = (2CP/T)Vnx  (CPwLO)2/[g2ms + (CPwLO)2)]        (10)                                         

where:

CP = the tail capacitance of the node between the LO switches and the RF transconductance stage;

T = the LO period;

gms = the transconductance of the LO switches; and

Vn = the equivalent flicker noise of the switching pair.

The NF of the proposed mixer can be expressed as Eq. 11:

                                                                                                                           (11)

where:

Vn, IN = the input noise voltage;

Vn, OUT = the total output noise voltage; and

Vn, CIR = the circuit-added output noise voltage.

From Eq. 10, it can be seen that the mixer’s NF is inversely proportional to its conversion gain. Table 1 summarizes some of the key circuit parameters for the design. 

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