Oscillator design for veryhigh- frequency (VHF) and ultra-high-frequency (UHF) applications has been well documented in books and journals. Most early work focused on frequency stability and, to a lesser extent, on efficiency and output signal quality. But with increasing use of advanced modulation formats in communications systems, and the growing need for oscillators with extremely low phase noise, greater design emphasis is now placed on achieving oscillator designs with low phase noise. Fortunately, with the availability of accurate phase-noise measurement equipment and improving computer-aidedengineering (CAE) tools for predicting and simulating phase-noise performance, the gap between oscillator simulations and measured results has narrowed. Still, many early oscillator design strategies were based on small-signal approaches that yielded less-than-accurate predictions for output frequency, output power, and phase noise. As an alternative, largesignal, time-domain calculations will be applied to the design of a groundedbase oscillator (rather than a Colpitts oscillator) to validate the effectiveness of this design approach. Part 1 of this three-part article series will explore the use of large-signal design techniques for a grounded-base 144-MHz oscillator.

By presenting the use of the largesignal, time-domain approach with nonlinear software simulation tools in the design of VHF/UHF groundedbased oscillators, the goals include (1) accurately predicting oscillator phase noise and deriving a set of algebraic equations for the noise calculations (many CAE tools provide incorrect answers about the phase noise) and (2) developing a set of empirical equations that will guide in the synthesis of VHF/UHF oscillators. The approach yields oscillators with the best possible combination of output power and phase noise.

As a point of reference, the traditional small-signal design approach will first be used to create an oscillator for comparison to a more optimized design developed with the novel large-signal approach. Using a mix of linear equations and one large signal parameter, the device transconductance (gm), the important noise parameters will be calculated and validated. Finally, based on this procedure, a simple but scalable and accurate set of formulas for oscillator synthesis will be presented. The novel large-signal design principles shown here for fixed or narrowband oscillators can also be applied to broadband voltage-controlled-oscillator (VCO) design. The methodology has been shown to work well even with multi-octave-band (1:3 frequency tuning range) tunable oscillators.20-32

The grounded base configuration (Fig. 1) is a popular circuit for VHF/UHF oscillators. It is simple and can be made with very low phase noise, since the RF voltage swing at the active-device's collector can be close to that of the supply voltage. Oscillation is based on the principle that power from the output is fed back to the emitter. This feedback arrangement generates a negative resistance at the output, compensating for the losses of the output-tuned circuit, and starts oscillating and then stabilizing the oscillation amplitude.1-4 A complete survey of grounded-base oscillator configurations and applications can be found in references 5 to 19.

These references include some of the more popular texts recently published on oscillators. Many of the authors have attempted to predict oscillator performance based on a set of linear calculations, including use of the Leeson model or similar methods to determine phase noise. For accurate predictions of phase noise, however, several key input parameters are needed, including the large-signal noise figure of the active device, the output power, and the operating quality factor (Q). The values of these parameters are not often known and more typically approximated (or guessed). The first successful attempts at determining the large-signal phase noise were reported in references 6 and 7. But these approaches are not useful without an accompanying CAE tool, and they don't provide design guidelines. Another problem with the linear approach is inaccuracy in predicting the actual oscillating frequency, with predicted results at higher frequencies often differing widely from actual performance.

Well-known for his work on amplifiers, Guillermo Gonzalez recently published a text on oscillators that provides an interesting overview of design based on linear calculations and CAE tools, although his approach does not provide optimum solutions.8 To demonstrate this, his methods will first be applied to the design of a 144-MHz oscillator. The resulting circuit neither provides the best output power nor the lowest phase noise and, at high frequencies, requires capacitor values that cannot be easily realized because of parasitic effects.

Figure 1 shows the typical configuration of the grounded base oscillator circuit. This type of oscillator works effectively from about 10 to above 1000 MHz. Following the procedures of ref. 8, and the large-signal conditions of ref. 11, it is possible to analyze this oscillator circuit. Kenneth Clarke was probably the first to publish the effect of the collector current conducting angle of an oscillator, but makes no mention of the relationship of it on phase noise, as done in ref. 10.

The oscillator circuit is based on a model BFR193 silicon bipolar transistor from Infineon Technologies (www.infineon.com). Designed for low-noise, high-gain amplifiers to 2 GHz, the transistor features a transition frequency (fT) of 8 GHz for +8 VDC collectoremitter voltage and 50 mA collector current. The first step in designing the oscillator circuit for this transistor is to determine the small-signal parameters for the transistor at 144 MHz and under the operating conditions of +8.8 VDC collector-emitter voltage (Vce, 10 mA collector current (Ic), 24 A base current (IB), and +0.64 VDC base-emitter voltage (Vbe). The 10-mA collector current was selected for stable transistor cut-off transition frequency. For more output power, a collector current of 30 mA is a better choice.

Figure 2 shows a circuit for generating the oscillator's small-signal parameters using Ansoft Designer CAE software from Ansoft (www.ansoft.com) and the time-domain model. The process is based on the configuration shown in Fig. 3 and the following definition:

I1
>
Y11 Y12 >
V1
>
(1)
I2 Y21 Y22 V2

Once Ansoft Designer is armed with the circuit parameters for the oscillator circuit, it uses the matrix to generate the Y-parameters:

Y11=G11 + jB11= (279.08-j95.07mS (2)

Y21=G21 + jB21= (-271.32 + j100.77)mS (3)

Y12=G12 + jB12= (-1030 + j78.06) μS (4)

Y22=G22 + jB22= (1020 + j536.14) μS (5)

Figure 4 shows a standard feedback oscillator topology using parallel circuit elements. In theory, the grounded- base configuration can be rotated into a Colpitts circuit, which is often referenced in the technical literature and based on the black-box theory (ref. 5). In terms of performance, however, it cannot be said that a mathematical rotation yields the same performance. In the case of the Colpitts oscillator, the RF voltage swing is now limited by the base-to-emitter and emitter-to-ground voltages. As a result, there is less energy stored in the circuit and, because of loading, the operational Q can be degraded for the grounded-base oscillator. For the Colpitts oscillator configuration, the collector-to-base voltage (Vcb) is about 12 V. Also, parameter Y22cb is less than parameter Y22ce, resulting in less loading than the grounded-base configuration. The Colpitts configuration is popular because of its simplicity and its perceived high isolation since the output power is extracted from the collector, although this is nothing more than perception due to the strong Miller effect at very high frequencies. In terms of configurations other than the Colpitts, the general time-domain approach presented here is valid not only for the Colpitts configuration but for other derivative configurations.

Conditions necessary for oscillation for the parallel feedback oscillator configuration of Fig. 4 can be described by

Yout + Y3 =>0 (6)

This condition can be expressed as:

Det
Y11 + Y1 + Y2 Y12-Y2 > =0 (7)
Y21-Y2 Y22 + Y2 + Y3
Y3= -Y22+Y2> + Y12-Y2{Y21-Y2} (8)
Y11 + Y1 + Y2>

where Yij (i,j = 1, 2) are the smallsignal parameters of the bipolar or FET model.

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As shown in Fig. 4, the active two-port network, together with feedback elements Y1 and Y2, can be considered as a one-port negative-resistance oscillator circuit. The following is an example of an oscillator design using the small-signal parameters determined above for 8.8 V and 10 mA at 144 MHz. The resulting output admittance (Yout) is shown in Eq. 9 (page 76).

The optimum values of feedback element are calculated from the expression of B*1 and B*2 and for 10 mA are shown in Eq. 10 (page 76).

(10 x 47 pF in parallel)

The optimum values of the real and imaginary part of the output admittance are:

are values for conjugate matching needed to compensate for resonator losses in Eq. 19 (on p. 76) and in:

for the case of a center frequency (f0 of 144 MHz and inductor L3 of approximately 2.59 nH).

Figure 5 shows the 144-MHz oscillator circuit using the small-signal parameters for establishing oscillation conditions. The required values for this parallel feedback topology are 478 pF for the feedback capacitor, 459 pF for the emitter-to-ground capacitance, 3.2 nH for the inductor, and 186 pF for capacitors C3A and C3B. Bypass capacitors Cb and Cc should be about 220 pF. Because of the difficulty of producing capacitors above 200 pF at these frequencies, it may be more reasonable to use several, up to 10, capacitors in parallel to achieve these values.

For the higher-output oscillator case operating at 30 mA, the values of the parameters are:

For a center frequency (f0) of 144 MHz and 30 mA operation, the component values for the oscillator are L3 of 3.77 nH, C1 of 518 pF, C2 of 503 pF, and C3 of 324 pF. As mentioned previously, because of the high values of C1 and C2, their values can only be achieved using multiple parallel capacitors of about 100 pF each.

Figure 6 shows the simulated plot of phase noise for the 144-MHz oscillator. The "linear" calculation indicates a resonant frequency of 143.2 MHz, while nonlinear harmonicbalance (HB) analysis provides the correct frequency of 144.2 MHz (a relatively large difference in percent frequency). Figure 7 shows the output power to be +5.1 dBm. The value was determined using the HB software program Nexxim from Ansoft Designer, although the Advanced Design System (ADS) software suite from Agilent Technologies (www.agilent.com) provided the same answers. The predictions from both CAE tools deviate less than 1 dB from measured results for the oscillator, assuming that the input SPICE type parameters for the transistor are accurate.

A variety of efforts have been made to deal with large-signal conditions for oscillator design, such as the timedomain approach. Reference 10 is a first successful attempt to calculate output power with reasonable effort, notably Eq. 10 within this reference.

There are many problems associated with both the large-signal analysis and noise analysis. From an experimental point of view, it is almost impossible to consider all possible variations. During the creation of the Ansoft Designer CAE program, for example, it was necessary for the developers to validate the accuracy of that software's large-signal noise analysis. As part of that validation, several critical circuits were used to compare CAE predictions with measured results, from crystal oscillators to voltage-controlled oscillators (VCOs). Measurements were made with well-known test equipment, including the R&S FSUP 26 spectrum analyzer with all necessary options from Rohde & Schwarz (www.rohdeschwarz. com). References 12 and 13 showed that the accuracy of this software's large-signal predictions is high, within 0.5 dB of measured results. This evaluation involved extensive analysis of noise in oscillators using a set of equations with a minimum number of CAE tools. The equations, derived in ref. 9, will be used for the current analysis.

The search for low oscillator phase noise has been well documented in the technical literature. Designers have published many different recipes, such as those based on the use of certain low-noise transistors, high-Q circuits, and various other things. In all of these approaches, however, the consequences of device large-signal operation and its effects on phase noise had not been well understood. To help gain a better grasp on the relationship between device large-signal behavior and phase noise, a complete mathematical analysis of a 144-MHz oscillator follows.

The design steps for achieving a 144-MHz oscillator by means of the large-signal approach include:

1. Calculation of the output power for the selected DC operating conditions. For this example, the same circuit as used above for the small-signal approach will be applied for a center frequency of 144 MHz. From ref. 9, the RF output current can be found from Eq. 27 (above) where:

V1 = the drive signal and x = the normalized drive level with x = qV1/kT with

Considering a 50-Ohm load, the RF output power can be calculated by means of

VRF(f0 = IRF 50 = 60 10-3 50 = 1 V (peak amplitude) (with no Vce saturation assumed).

The oscillator output power at 144 MHz is then Pout(f0 = VRF2(f0/2RL = 1/(2 50) = 10 mW = +10 dBm

2. Calculation of the large-signal transconductance for a normalized drive level can be performed by means of Eq. 28 (above), while the largesignal transconductance (Gm) can be found from Eq. 29 (above).

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This assumes an ideal intrinsic transistor. To perform the transition from an intrinsic to an extrinsic transistor, parasitics (package effects, lead inductance, and bond wires) are added by correcting the final results for capacitances and inductances. The transition frequency (ft) of the transistor used is high enough so a phase shift correction for the small-signal transconductance (gm) is not necessary at these frequencies (VHF).

3. Values of the feedback capacitors can be calculated in the following way. The value of n can be in the range of n , where n1 is 2 and n2 is 5 for a drive level of x = 15 (in pursuit of low-phase-noise performance). Assuming n = 5, the values of capacitors C1 and C2 can be calculated as

The ratio of C1 to C2 is 4.

The final design step for the 144-MHz oscillator using the largesignal approach involves finding the value of inductor L, which can be performed by knowing the relationship of the oscillator's operating frequency to the inverse of the square root of the oscillator's inductance and capacitance and selecting a value of L for optimum phase noise.

Next month, Part 2 of this threepart article series will show the details of calculating the value of L for the 144-MHz oscillator, and how to apply the large-signal approach and commercial software to compute the oscillator's phase noise.

REFERENCES
1. F. E. Terman , Radio Engineers' Handbook, McGraw- Hill, New York, 1943, p. 498.
2. F. Langford-Smith, Ed., Radiotron Designers Handbook, Electron Tube Division, RCA, Harrison, NJ, 1954, p. 947.
3. L. J. Giacoletto, Electronics Designers' Handbook, McGraw-Hill, New York, 1977, p. 16-1.
4. F. Vilbig, Lehrbuch der Hochfrequenztechnik, vol. 2, Akademische Verlagsgesellschaft Becker & Erler Kom.- Ges., 1937/1942, p. 235.
5. K. L. Kotzebue and W. J. Parrish, "The Use of Large Signal S-parameters in Microwave Oscillator Design," in Proceedings of the 1975 International Microwave Symposium On Circuits and Systems.
6. V. Rizzoli, A. Neri, A. Costanzo, and F. Mastri, "Modern Harmonic-Balance Techniques for Oscillator Analysis and Optimization," in RF and Microwave Oscillator Design, M. Odyniec, Ed. Artech House, Norwood, MA, 2002.
7. W. Anzill, F.X. Kaertner, and P. Russer, "Simulation of the Single-Sideband Phase Noise of Oscillators," Second International Workshop of Integrated Nonlinear Microwave and Millimeterwave Circuits, 1992.
8. Guillermo Gonzalez, Foundations of Oscillator Circuit Design, Artech House, Norwood, MA, 2007.
9. Ulrich L. Rohde, Ajay K. Poddar, and Georg Boeck, The Design of Modern Microwave Oscillator for Wireless Applications Theory and Optimization, Wiley, New York, 2005.
10. Kenneth M. Johnson, "Large Signal GaAs MESFET Oscillator Design," IEEE Transactions on Microwave Theory & Techniques, vol. MTT-27, No. 3, March 1979.
11. Kenneth. K. Clarke, "Design of Self-Limiting Transistor Sine-Wave Oscillator," Circuit and Systems, IEEE Transaction on , vol. 13, issue 1, March 1966, pp. 58-63.
12. U. L. Rohde and J. Whitaker, Communication Receivers: DSP, Software Radios, and Design, 3rd ed., McGraw- Hill, New York, 2001, pp. 413-422.
13. U. L. Rohde and D. P. Newkirk, RF/Microwave Circuit Design For Wireless Applications, Wiley-Interscience, New York, 2000, pp. 798-812, 413-422.