Boundary Scan for Testing On-Board DDRs

Sponosored by: Agilent Technologies

    Date & Time

  • This webinar is now available On-Demand.
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    Event Type

  • On-Demand Webinar

Speakers

 

Adrian Cheong
Product Manager
Agilent Technologies
Jun Balangue
Technical Marketing Engineer
Agilent Technologies

 

Description

Why this webcast is important:

This webcast describes the issues many manufacturers are seeing in regards to the testing of DDR memory soldered on their products. It acknowledges that DDR testing in manufacturing is important because one of the outcomes of defects in assembling DDRs on the board is that the controller that they are connected to will not boot. Consequently, the product is "dead" and will not respond to any stimulus, making it difficult to troubleshoot. Agilent proposes a solution using boundary scan techniques which works around the problems faced in manufacturing and is simple enough to be implemented in NPI, so that the defects can be caught early in the product life. We will also describe how the test methods used in this solution can be applied to other products with similar issues in order to boost the test coverage on these boards and thus have better confidence in the quality of the products shipped to customers.

Who should view this webcast:

Test managers, Test engineers, NPI engineers, R&D PCB layout engineers, product managers

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