Analog signals are often digitized as quickly as possible in modern communications systems and test equipment in order to perform signal processing in the digital domain. But designing the transformer frontend circuitry for an analog-to-digital converter (ADC) can be challenging, especially in systems with high intermediate frequencies (IFs). Fortunately, this streamlined, five-step process can help develop an optimum front end for an ADC. It can be applied easily and quickly to achieve the desired performance in almost any application.

The five-step process is based on a straightforward and logical procedure:
1. Know the system and the design requirements.
2. Determine the ADC's input impedance.
3. Determine the ADC's baseline performance.
4. Select transformer and passive components to match the load.
5. Bench test the design.

For example, the first step sounds obvious, but just knowing the requirements of a particular application can quickly cut down the number of iterations that must be done, selecting the right components from the start and quickly achieving the desired performance. Make a list of each design requirement, and set desirable boundaries to work within. This will enable selection of the ADC and transformer to go quickly.

Using an example, assume an application that requires a sampling rate of 61.44 MSamples/s to capture input signals across a 20-MHz band centered at 110 MHz (100 to 120 MHz). The required signal-to-noise ratio (SNR) of better than 72 dB implies the use of a 14-b ADC to provide the needed SNR performance. The power consumption should be less than 500 mW per channel. A quick search for an ADC that can meet these system-level performance requirements led to the 14-b, 80-MSamples/s model AD9246 ADC from Analog Devices designed to run on supplies from 1.8 to 3.3 V. The device was selected for its wide bandwidth and low power consumption (Table 1).

In this example design, the ADC will be fed with an input 110-MHz IF with 20-MHz bandwidth and 61.44MSamples/s sampling rate. Since the bandwidth is narrow (one Nyquist band), a resonant match technique is used. This type of match provides less bandwidth, but allows excellent matching over the specified frequency range. This technique usually requires the addition of an inductor or ferrite bead directly across the analog inputs to resonate the parasitic capacitance away from what is seen by the ADC's input stage. If the IF of interest is in baseband (first Nyquist), then a lowpass filter can be derived using a simple RC network.

The second step in the process involves finding the ADC's input impedance (Fig. 1). The device in question, the model AD9246, is an unbuffered or switched-capacitor-type ADC. This means that the input impedance is time varying and changes with respect to analog input frequency. To determine the input impedance for this device, the spreadsheet on the AD9246's product page can be used (which can be located at: http://www.analog.com/en/prod/0, 2877,AD9246,00.html). From that spreadsheet, it is simply a matter of finding the impedance measured at 110 MHz in the track mode. In this example, the ADC's internal input load looks like a differential 6.9-kW resistor in parallel with a 4-pF capacitor. It is best to match in the ADC's track mode, as this is when the ADC is actually taking the sample. Table 2 shows a portion of the spreadsheet from the AD9246's product page.

The third step involves determining the ADC's baseline performance in order to better understand how the ADC behaves before trying to optimize all of its design parameters. To establish this reference, use the evaluation board as configured in its default condition. This is most likely how the ADC was characterized for the specifications shown on the product datasheet.

Next, start gathering the performance specifications. This can be achieved by collecting a Fast Fourier Transform (FFT) with a 110-MHz input frequency at –1 dB full scale (dBFS), yielding an SNR of 72 dB and an spurious-free dynamic range (SFDR) of 82.7 dBc, close to the datasheet specifications. Characterization should be performed with a high-performance signal generator and filter to clean up any signal-generator harmonics and spurious content when performing the testing.

Following this, the filter is removed and the ADC's evaluation board is reconnected to the test signal generator. The output level of the generator should be readjusted and noted, in this case +14 dBm, in order to collect the input drive number. The input frequency should be swept over enough bandwidth to see how the passband flatness changes and to achieve the –3-dB points.¹ In this case, the front-end default configuration has a simple RC filter which makes for a passband flatness of 1.2 dB and a bandwidth of about 100 MHz.

Now that this data has been collected, it is time to make some decisions. With a requirement of 72 dB SNR and 83 dBc SFDR, it is essential that an anti-aliasing filter (AAF) be used to improve the spurious performance and keep the signal harmonics low. This still doesn't solve the input drive and passband flatness issues, however. The AAF on the default evaluation board quickly attenuates the passband of interest. Using a simple shunt inductor can help, as it will provide less attenuation at the frequency of interest, and it rolls off more graciously outside the band. For the input drive, a 1:4 transformer will be considered to achieve the full-scale of the ADC. This will gain the signal by +6 dB, thus offsetting the input drive requirement even more. Finally, the input impedance and VSWR should be measured with a vector network analyzer (VNA). Dial-in the frequency of interest to see how well the input matches. In this case of this example, 35 ohms was measured at 110 MHz, yielding a VSWR of 1.44:1.

The fourth step involves selecting the transformer and passive components to match the impedance of the load. In the previous step, the foundation was laid by creating a baseline. Next, the transformer and component values for both R and L must be selected to match the load and create a new AAF that will achieve the desired overall performance between the ADC and secondary of the transformer (Fig. 2).

This is where experience or experimentation can come into play. Selecting the transformer can prove to be difficult, since the performance of different transformers can vary widely. The transformer for this example was chosen because it has been measured and its capabilities are understood. In general, it is important to choose a transformer with a good phase imbalance characteristic. This example application has a narrow bandwidth and requires a low input drive, so a known transformer with a 1:4 impedance ratio will be used.