Package Transitions
The package transition from the die to the board was examined using the High-Frequency Structure Simulator (HFSS) three-dimension (3D) EM simulator from Ansoft Corp. (www.ansoft.com). The transition included the bond wires, package lead, and printed-circuit-board (PCB) microstrip. A procedure further characterizing the transition was also developed. In developing the simulation procedures, it was determined that the full package measurement equals the input transition plus the die measurement (with encapsulant) plus the output transition. First, a package's S-parameters (with die) were measured. Then, the encapsulant was cured atop a die in an open-top package while leaving the on-chip RF input and output pads exposed. The die's S-parameters were measured by probing directly onto the chip. The 3D simulation of the transition was verified by comparing the full package measurement to the combination of the simulated transition on the input, plus the measured die, plus the simulated transition on the output. To ensure low return loss, a tuning circuit on-chip compensated for the package transition's parasitic response. Figures 8 and 9 show the return-loss performance.

An MMIC designer should consider die temperature to assure adequate reliability. For example, a typical PCB carrying the package heats to a maximum +80ºC under worst-case operating conditions. The 8-mil-thick copper alloy package paddle adds +3ºC thermal rise while the high-thermalconductivity epoxy adds another +3ºC thermal rise. The 100-µm-thick GaAs substrate contributes an additional +43ºC thermal rise under the FET that is at the highest typical operating temperature. With a worst-case channel temperature of +129ºC, the MMIC's median lifetime is greater than 800 years. Circuit-board design, choice of epoxy, and FET thermal design are important product lifetime considerations and must be consistent with system- application requirements.

Several design considerations influenced the physical dimensions of the die inside the package. To minimize parasitic bond wire inductance in the RF path, the die horizontal dimension was lengthened to shorten the RF bond wires. The die vertical dimension was decreased to minimize die size. However, by minimizing the die size, the DC bond wire lengths increased to approximately 1 mm (about 0.8 nH). The increased DC bond wire inductance can cause insufficient bypassing in the 100-MHz-to-1-GHz frequency range. This is the frequency range below the efficacy of on-chip bypassing, but above the frequency where the first out-of-package bypass capacitor is effective through the bond wire inductance. A representative 3D model of the DC package lead, the bond wire inductance, the on-chip bond pad and the microstrip line to the out-of-package capacitors were all simulated. The circuit's outof- package capacitors consisted of equivalent RLC models. Loop-gain analysis4 performed on all FETs ensured stability.

The S-parameters of the measured package matched the simulated sparameters well. Figure 7 shows the simulated gain and the measured gain. The reference planes for the measurements are on the PCB 0.9 mm from the package edge. The TGA2521- SM die in open-air was also measured and can be seen with the package measurement in Fig. 6. The band shift and gain change are due to the encapsulant's effect on the matching networks and FETs. Figures 8 and 9 show good return-loss performance due to the package transition characterization and tuning network. In addition to good small-signal performance, the TGA2521-SM is designed to produce greater than +20.5-dBm output power at 1-dB gain compression, greater than +31 dBm third-order intercept when measured at +4.5 dBm per test tone, and greater than 14.5-dB gain control.

In summary, this report has detailed special MMIC design techniques that compensate for the environment presented by an encapsulated package. A simple method for modeling the effects of encapsulant on active FET devices improves the accuracy of the active models. The encapsulant changes the performance of the passive structures and the package transition affects return losses. Other considerations, such as the thermal budget, can affect the design of the die and package, especially for devices with high power dissipation. These techniques are now being used effectively in the MMIC design process and will become more important as the market for high-frequency packaged MMICs increases.

REFERENCES
1. Michael J. Golio, Microwave MESFETs and HEMTs, Artech House, Norwood, MA, 1991, pp. 207 - 237.

2. Dambrine Gilles, Alain Cappy, Frederick Heliodore, and Edouard Playez, "A New Method for Determining the FET Small-Signal Equivalent Circuit," IEEE Transactions on Microwave Theory & Techniques, Vol. MTT-36, No. 7, 1988, pp. 11151-1159.

3. R. Anholt and S. Swirhun, "Equivalent-Circuit Parameter Extraction for Cold GaAs MESFETs," IEEE Transactions on Microwave Theory & Techniques, Vol. MTT-39, No. 7, 1991, pp. 1243-1247.

4. Paul R. Gray and Robert G. Meyer, Analysis and Design of Analog Integrated Circuits, Wiley, New York, 1977, pp. 599-607.