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The broad swath of spectrum (7500 MHz) allocated by the United States Federal Communications Commission (FCC) in 2002 in the 3.1 to 10.6 GHz range creates many opportunities for new communications systems and their components.1 The benefits of such ultrawideband (UWB) radios include low-power operation, high data rates (to 1 Gb/s), reduced interference, and low cost.

One of the key component blocks in these radios is the low-noise amplifier (LNA), which must meet several stringent requirements—including broadband input matching, flat and high power gain, low noise figure, high linearity, and low power consumption. The design of such an amplifier can be a great aid to these UWB radios and systems.

Common-source and common-gate LNAs

A number of UWB LNAs have been developed based on CMOS technology.2-8 The distributed amplifier (DA) has been one of the more popular architectures for this application. Since DA LNAs provide good wideband input matching, flat gain, and generally high input third-order intercept (IIP3) performance, they are well suited to these UWB applications.2-4 But DA LNAs consume a great deal of power with relatively low power gain in a large chip area.

Resistive feedback is a good solution for obtaining wide bandwidth and flat power gain.5-7 However, the use of a resistor in the feedback path reduces the power gain and degrades noise performance. One recent LNA topology of note is the cascode configuration with a Chebyshev input matching filter, which provides good wideband input matching and high power gain8; however, the noise figure is degraded by the filter’s insertion loss.

One challenge for UWB LNAs is posed by the linearity requirements, owing to the large numbers of in-band interference sources in that frequency range and the cross-modulation/intermodulation caused by blockers or transmitter leakage in a reconfigurable receiver.9 Furthermore, while the transmit frequency (fT) increases with technology scaling, linearity tends to degrade due to lower supply voltages in use and high-field mobility effects.9 This makes wideband linearization important.10,11

Linearization techniques which optimize overdrive voltage (Vgs - Vth) can be used to obtain peak IIP3. However, the bias voltage range for peak IIP3 is narrow, so that boosting linearity can be sensitive to process variations. The derivative super-position (DS) method12-14 uses an additional transistor’s nonlinearity to cancel that of the main device; it involves MOS transistors working in triode12 or in the weak inversion region13,14.

Therefore, using the DS method, it is difficult to match the transistors working in different regions, resulting in a linearity improvements that are highly sensitive to variations in pressure volume and temperature (PVT). The body biasing technique15 is suitable for improving linearity performance; unfortunately, it degrades gain and noise performances. In ref. 16, the post-distortion technique was used to improve linearity, with good results.

To achieve good performance for UWB systems, a common-gate (CG) LNA design is proposed. These LNAs offer simple input matching networks with good linearity and low power consumption compared to common-source (CS) LNAs. Because the power gain of a CS LNA tends to be low,17 a CS amplifier is used in this design as a second stage. The proposed LNA design employs current-reuse and forward body biasing techniques to achieve low power consumption. In addition, shunt-series peaking techniques are used to extend the 3-dB bandwidth, and a post-distortion technique is employed to improve the linearity performance.

Based on their input matching characteristics, reported CMOS UWB LNA architectures can be divided into two major groups: CS and CG LNAs.18 Figure 1 offers the two general topologies for these amplifier types. Figure 1(a) is a CS LNA that requires at least two inductors (Lg and Ls) for simultaneous noise and input matching (SNIM). Assuming the channel resistance, γ0, and the gate-drain parasitic capacitance, Cgd, are negligible, the CS LNA’s quality factor (Q) can be derived as:

Eq. 1-2

Substituting Eq. 2 into Eq. 1 yields Eq. 3:

Eq. 3

where:

ω0 = the resonant angular frequency of the input impedance;

gm = the transconductance of the metal-oxide-semiconductor field-effect transistor (MOSFET);

Lg = the gate inductor;

Ls = the source inductor; and

Cgs = the gate-source parasitic capacitance of the device.

The architecture is inherently narrowband because of the high Q value and the difficulty in achieving wideband input match to the signal source in the presence of the parasitic capacitances. Figure 1(b) shows a typical CG LNA. The input matching network of the CG LNA has a parallel resonance, and the Q of the CG LNA can be expressed as:Eq. 4-5

By substituting Eq. 5 into Eq. 4, QCG can be expressed by Eq. 6:

Eq. 6

Since Ls is intended to block the RF leakage to the ground, the Ls value of a conventional CG LNA is higher than that of a CS LNA, and the Qcs value is higher than the Qcg value. Obtaining a wideband input match and absorbing parasitic capacitances with a CG LNA is relatively simple, making this a suitable topology for UWB applications.

Proposed UWB LNA design

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