Peter Beeson

Peter
Beeson
Articles
Analyze Phase Noise In A Sampled PLL (Part 3)
The final installment of this three-part series on phase noise in sampled PLLs examines the effects of noise sources, including the tunable and reference oscillators, on overall synthesizer performance.
Analyze Phase Noise In A Sampled PLL (Part 2)
Part 2 of this three-part series on phase noise in sampled PLLs analyzes the differences between the behaviors of continuous-time and sampled loops and how they can be modeled effectively.
Analyze Phase Noise In A Sampled PLL, Part 1
The first installment in this three-part series helps understand the noise sources in a PLL synthesizer and the effects of the sampling frequency upon the ultimate phase-noise performance.
Whitepapers

IMD Measurements with IMDView: MS4640B Series Vector Network Analyzer
Sponsored by Anritsu
‚Äč
Download this white paper


How to Select an Analog Signal Generator
Sponsored by Rohde & Schwarz
Download this white paper

Webcasts

MIPI - Overcome Test Challenges to Ensure Interoperability for your PHY
June 23, 2015 @ 1pm EST
Sponsored by Keysight Technologies
Register Now!


Automating Semiconductor and Power Semiconductor Device Testing
June 24, 2015 @ 1pm EST
Sponsored by Keysight Technologies
Register Now!


Successfully Make Power and AC Line Disturbance Measurements
June 25, 2015 @ 1pm EST
Sponsored by Keysight Technologies
Register Now!

 

Connect With Us

Sponsored Introduction Continue on to (or wait seconds) ×