This technology provides accurate frequency generation entirely in standard CMOS, a task formerly accomplished exclusively with quartz resonators and crystal oscillators.
Clock generation generally evokes images of quartz crystals and quartz-crystal oscillators. The technology has existed since before World War II and has provided reliable reference signals in communications systems around the world. If ever a technology could be considered "disruptive," it would be the one that displaced or at least provided an alternative to quartz crystals for this task. As will be shown, that technology exists and is based on the fabrication of reference signal sources entirely with silicon CMOS technology, forming a line of signal generators called CMOS Harmonic Oscillators (CHO™).
In almost every electronic system manufactured at present, frequency references take the form of a quartz-based crystal or crystal oscillator. Fundamental-mode crystals, which operate up to around 50 MHz, can be manufactured in volume at acceptable costs. Higher-frequency oscillators need to be built with third or fifth overtone crystals. While appropriate for early communication standards, the practical frequency limit of fundamental mode quartz crystals proves insufficient to meet the bandwidth demand of many interface standards directly (Table 1). A simple solution for overcoming the frequency limitation of a crystal oscillator is to couple it with phase-locked-loop (PLL) circuitry, which can be used for frequency multiplication.
A key point to note from Table 1 is that the clock references run at significantly lower frequencies than the channel transmission frequencies (clock rates). The ratio of channel to reference frequencies increases with each new generation of transmission standard. The increased bandwidth demand of modern multimedia and communications systems drives up channel frequencies as designers attempt to transmit and receive higher data payloads per transmission window. However, the manufacturing methods of self-resonant components such as quartz-based crystals cannot be scaled at the same rate. Consequently, higher multiplication ratios are needed for PLL-based frequency sources (with crystal-based references). Unfortunately, frequency multiplication with a PLL exacts a penalty on phase noise and jitter—the two key figures for accuracy of clock signals.
To overcome the frequency limitation of fundamental-mode quartz crystals, and provide an economical alternative to expensive, higher-frequency third- and fifth-overtone crystals, Mobius Microsystems has developed a new type of oscillator that eliminates the need for an external, quartz-based reference. The new device is called a CMOS Harmonic Oscillator (CHO) and, as the name implies, is implemented entirely in standard CMOS and doesn't rely on mechanical resonators such as quartz or microelectromechanical-systems (MEMS).
Unlike the traditional approach, the output frequency, which will be used as the reference clock for a communication channel transmission physical layer (PHYs), is generated in a top-down approach. The CHO features an RF harmonic inductive-capacitive (LC) oscillator that can be configured for frequencies from about 1 to 3 GHz. While LC resonators are commonly used as voltage-controlled oscillators (VCOs) in PLL-based systems, the LC resonator in the CHO is configured to run in an open-loop state without feedback path or reference frequencies. Its frequency is instead compensated automatically over temperature, voltage, and process shifts by complex, patented analog circuitry that is programmed at the time of production test.
By taking an RF-approach to high-frequency (HF) clock generation, the CHO technology achieves far-from carrier phase noise that is comparable to best-in-class quartz crystals, and benefits from the higher scalability and reliability of standard CMOS processes compared to quartz fabrication methods. The prior art in the industry was limited to lower frequency, and lower accuracy CMOS relaxation or ring oscillators or low frequency MEMS resonators.
The improvement in phase noise of the CHO architecture is due to the high resonance frequency of the LC core, which is then divided down to achieve the required channel frequencies. The division ratios improve the farfrom carrier phase noise (Table 2), making the CHO an ideal replacement for expensive crystal oscillators.
As Table 2 shows, the drawback of the frequency multiplication topology is that the phase noise of the resultant output is increased by +20logM, where M is the multiplication factor (see figure).
Phase noise is the magnitude of energy (in dB) of a clock signal measured at an offset f (in Hz) from the carrier to quantify the spectral purity of a source. While phase noise is a frequency-domain qualifier, period jitter is a time-domain qualifier. Period jitter is the difference between the measured clock period and the ideal clock period. It has been shown that period jitter is correlated to single-sideband (SSB) phase noise by the following expression:
ω0 = the fundamental oscillation frequency,
(N0/P0)fm = the SSB phase noise at an offset of fm from carrier, and h(fm) = the parameter that sets the bandwidth of the system.
As can be seen in Fig. 1, the trigonometric function reduces the close-to-carrier contributions of phase noise to the period jitter. Conversely, as fm moves away from the carrier, the trigonometric function increases, and the SSB phase noise contributes more significantly to period jitter. In RF systems with narrow channel separation, close-to-carrier phase noise is critical because it can lead to frequency downconversion issues. Just as critical in most consumer and communication applications is farfrom carrier phase noise because of the impact of random period jitter in these designs. One problem with PLL multiplication is that while the output of the PLL tracks the resonator phase noise within the loop bandwidth, it begins to track the phase noise of the PLL's internal VCO at frequencies higher than this bandwidth. Since commonly used ring oscillator VCOs have poor phase noise compared to crystals, frequency multiplication with PLLs may yield poor phase noise where it matters most, at offsets far from the carrier.
While having excellent far-from carrier phase noise and jitter are certainly key requirements in today's communication interface design, an optimal frequency source such as the CHO needs to satisfy a broader set of requirements, including mean frequency accuracy over environmental conditions such as temperature, supply voltage, and process corners; excellent reliability; good shock and vibration immunity; reliable startup every time and under every possible operating condition; and scalability and short order lead times. The patented CHO architecture was developed with these considerations in mind. The company will release the first samples of the oscillator soon and a future article will discuss these points in greater detail.
Fundamental-mode crystals, which operate up to around 50 MHz, can be manufactured in volume at reasonable costs and are used in almost every communication link today. As the bandwidth requirements of multimedia and communication applications increase, so do the operating frequencies of interfaces that these applications use. In light of the changing system requirements, Mobius Microsystems has developed a new type of frequency source—the CHO. It is designed to overcomes the frequency limitations of quartz crystals and also improve the reliability and scalability of existing solutions through clever RF circuit-design techniques and standard CMOS processes.