Inside Track with Aaron Partridge, SiTime

We released the first commercial MEMS timing devices in 2007. Since then, it has been a process of improving performance and developing parts for particular applications. For example, our recently released low-power, 32-kHz XOs (oscillators) and temperature-controlled crystal oscillators (TCXOs; precision oscillators) are designed for timekeeping in mobile devices. They took years to develop, but they are now in high-volume production.

Things are moving very quickly as we improve performance and develop new capabilities. I like to think of it as a case for Moore's Law. Because we are a semiconductor company, we need to act like one. That means that every technology generation brings a whole new level of capability.

JJD: What benefits do silicon and MEMS technology bring to timing solutions?

AP: The big picture is pretty simple: Anytime silicon can do a job, it replaces the incumbent technology. Take film, for example. We don’t photograph with film anymore. Or look at the simple floppy disk; memory sticks replaced those. Of course, the list goes on. The reasons behind each change are a bit different, but there is a common thread. Simply put, silicon does a better job with higher reliability and more versatility at a lower cost. It is the same in timing. Quartz crystals have been around since 1920. Within their limits, they have worked well. Now, quartz is getting siliconized.

Why is this? It is the leverage brought by silicon. We have invested trillions of dollars in silicon—understanding the material, developing design tools, building fabs, and educating generations of engineers in how to use it. That investment is leverage. Let’s say I want to build something in silicon. I can design with highly optimized and tested tools. I can get ultra-pure material from a variety of suppliers. I also can go to billion-dollar fabs that I don’t need to build. I can even contract with a solid infrastructure of packaging and testing suppliers. Basically, I can use silicon’s economics of scale. What could compete against that?

JJD: How are silicon-MEMS timing devices able to achieve such a high level of programmability?

AP: When an artist chooses a medium, he or she adopts the capabilities and limitations of that medium. A painter works in two dimensions, while a sculptor works in three. A filmmaker works with motion and sound. In quartz, one is generally limited to producing output frequencies at the physical resonances of the crystals. For example, 25-MHz mechanical crystals produce 25-MHz output signals. In silicon, we have circuits in our medium, so we use them. We can build phase-locked loops (PLLs) and digital-state machines. We also have nonvolatile memory to store configurations, so we can build in programmability.

PLLs are now capable of shifting reference frequencies with extreme accuracy (down to sub-parts-per-billion) with low phase noise and at low power. At the same time, we can measure temperature with amazing accuracy—better than a thousandth of a degree at a hundred-Hertz update rate. Put the two of these together and one can temperature-compensate an oscillator with fantastic accuracy. Why not allow the output frequency to be anything from 1 Hz to 500 MHz? The PLLs are there, so let's use them.

JJD: How does CMOS integration lead to higher-performing timing products, and what are the extents of that benefit?

AP: I should start by defining what we mean by “integration.” There are two types: homogeneous and heterogeneous. With homogeneous, the CMOS and MEMS components are built on one die. In contrast, heterogeneous means that they are built on separate die and packaged together. We can do either, but heterogeneous integration gives the best performance. We can optimize the MEMS and circuit processes individually. So we build the resonators on MEMS die and mount them directly onto CMOS die.

In oscillators, the first stages of the first amplifiers generally dominate the noise. When one analyzes this noise, one finds a term for the input capacitance. Increased capacitance results in more noise. In MEMS oscillators, the resonators are small and very close to the circuits, which decreases the capacitance to typically 1 pF for MEMS instead of 10 pF for quartz. One needs to be careful that the downstream circuit’s noise contributions are small as well, but that 10× head start is a big advantage. So CMOS integration can lead to lower noise.

Next are the PLLs. It may be surprising to think this way, but well-designed PLLs can reduce signal noise. At frequency offsets outside the PLL bandwidth, they can supply tremendously low phase noise that is limited only by their output dividers and driver stages. So I often say, “PLLs are our friends!” Our low-jitter oscillators provide sub-picosecond integrated jitter, thanks to the PLLs. This is part of leveraging the silicon and an example of the performance benefits we get from CMOS.