Thermal management efforts for high-power PIN diode switches should include a combination of test equipment and software, using thermal imaging and 3D thermal modeling, respectively.
Thermal management is one of the critical disciplines in high-power, high-reliability PIN diode design. Although power levels can vary dramatically for components operated under continuous-wave (CW) and pulsed conditions, the goal of any thermalmanagement effort is the effective dissipation of power to prevent thermal buildup in the component and system in which it is used. Fortunately, the task is made simpler by moderately priced infrared thermal imagers and finiteelement- analysis (FEA) software that can run on a wellequipped personal computer (PC).
Although high power levels in a CW system can be more stressful on components than high power in a pulsed system, the effects are relatively straightforward to predict and measure since the components and system will arrive at a single steadystate condition. The dynamic nature of a pulsed system is more difficult to predict. The short bursts of energy in a pulsed system rapidly heat critical elements when the power is on, but those same elements can rapidly cool when the power is off. In predicting the effects of high power levels on such a system, it is necessary to know if these elements fully cool down before the next burst of energy arrives. Without proper control of the heat rise, thermal runaway could occur, a condition in which each successive pulse adds to a continuing rise in the temperature of a critical element until performance degradation and/or failure occurs. The thermal time constant is the critical parameter in how quickly the element heats and cools.
In developing a thermal-management strategy for a PIN diode switch operating at high power levels, it is necessary to examine three primary elements:
the PIN diode junction (with a short thermal time constant),
the substrate on which the PIN diodes comprising a switch are mounted (which has a longer thermal time constant), and
the PIN diode switch's housing (with a very long thermal time constant).
When RF power is applied to a PIN diode switch, heat is primarily generated by the dissipation of power in the diode junction as it absorbs a small amount of the power and converts it to heat. How the heat spreads from the diode junction to the substrate and then to the housing over a series of pulses will ultimately determine how hot the junction of the PIN diode gets. It has long been proven that maintaining a junction temperature below +150oC is required for high reliability.
Analysis of a high-power CW system is performed by means of thermal imaging in conjunction with thermal software simulations. Figure 1 shows the steadystate thermal image of an RF switch under high CW power conditions. The PIN diode switch incorporates chip-and-wire construction with a variety of series and shunt inductive (L), resistive (R), and capacitive (C) elements soldered and bonded onto the switch circuit substrate. Thermal imaging can provide invaluable insight into the heat flow of such a circuit and potential hotspots where heat might build to potentially dangerous temperatures. Verifying prior assumptions about heat dissipation or discovering unexpected hot spots aids in building a broad knowledge base of high-power devices. In addition, the use of Solid- Works Simulation FEA software from Dassault Systems SolidWorks Corp. (www.solidworks.com) has drastically increased thermal management capabilities when designing high-power PIN diode switches. This is typically done in three steps: generating a thermal model, verifying the model, and calibrating the model.
The SolidWorks Simulation software interface allows the use of existing solid models for housing, shims, substrates, and other major components in a PIN diode design. Threedimensional (3D) modeling of PIN diodes allows for accurate simulation of heat dissipation, occurring in the intrinsic (i) region, as well as incorporation of the varying material properties in each region, due to the doping of the silicon.1,2 Given that the doping concentrations of the positive (p) and negative (n) regions of silicon diodes are not always known, it is usually best to assume a fully doped concentration, due to the fact that doping levels have a maximum and the doping concentration has an inverse effect on the desired thermal properties. Figure 2 shows a typical PIN diode 3D model.
The diode's i-region can be assumed as pure silicon and the thermal properties of that material applied to the model, while for the p-region the properties of boron-doped silicon can be applied and for the n-region the properties of phosphorousdoped silicon can be used in the model. With these device region properties established, a solid model assembly is then created and meshed in preparation for simulation inputs. Figure 3 shows a meshed model containing two PIN diodes, mounted on an aluminum nitride substrate, then mounted to a pedestal portion of a metal housing. Meshing should be performed in such a way that an ample number of nodes and elements are present through the thickness of each portion of the switch's geometry, resulting in the biased mesh in Fig. 3. To improve accuracy, the software allows for the definition of contact interfaces between solid bodies to include the thermal resistance of solders or epoxies used to attach each component. To run the simulation, proper boundary conditions and power dissipation must be employed. Power is dissipated evenly throughout the volume that constitutes the i-region of the diode, the amount of which is based on the estimated power loss across the diodes. Boundary conditions are selected that can be replicated in the test lab under a thermal imaging camerafor example a baseplate held at +25oC, achieved by a liquid-nitrogen-fed temperature control unit.
Model results can now be compared to thermal images. Discrepancies can be compensated by adjusting inputs to the simulation, creating a calibrated thermal model for the part under analysis. Once such a calibrated model has been constructed, the effects of changing factors, such as epoxies/ adhesives, material geometry/ properties/orientation, and boundary conditions, may be explored very quickly on the computer model, eliminating the need for long time spent to physically rebuild and test each new switch configuration. After a design is optimized using simulations, and a physical prototype of the unit is built, the results may then be verified by means of thermal imaging of the prototype. Figure 4 shows the thermal analysis results for a switch consisting of four shunt PIN diodes with an uneven power dissipation across the diodes.
In some thermal modeling efforts, it may be tempting to use the thermal rise from device base to junction (θjc), as reported on PIN diode data sheets, to calculate the thermal rise through the diode, and omit the component model from a computeraided thermal analysis. However, the details contained in a cross section of a model (Fig. 5) will provide valuable insight when considering results of a transient response.
For many high-power PIN diode switch applications, the worst-case heat dissipation occurs in a pulsedpower condition. For very short duration pulses, the transient response cannot be captured using thermal imaging equipment. Consider a PIN diode switch with 2800-W input power and 0.1-dB insertion loss, all of which is assumed to occur at the PIN diodes. Combined with the electrical heat generated by the diode as the product of the current squared and resistance (P = I2R), this results in 64 W of dissipated heat at the PIN diode, specifically in the intrinsic region. For this example, consider a pulse duration of 715 ms and a duty cycle of 22 percent.
The first step in analyzing a PIN diode switch under these conditions is to calibrate a thermal analysis model according to a known CW power input condition that can be verified in the test laboratory. The selection of this CW power level can be made by calculating the average power that the switch sees under pulsed conditions, although different levels may be used if they help to simplify the test setup. After the model is fine-tuned and calibrated, a transient input may be entered into the model. At this time, having the discrete 3D model of the PIN diode geometry is a very valuable asset. By setting up probes at various spots within the model, it is possible to track the thermal response at those locations. Figure 6 plots temperature as a function of time for different probe locations in the example.
To help with the model development, the on-cycle thermal rise response of a PIN diode can be characterized by the equation:
ΔTM = PDθ(1-e-t/t)
ΔTM = the temperature rise above the heat-sink temperature,3
PD = the power dissipation,
θ = the thermal resistance, and
t = the thermal time constant.
The off-cycle thermal decay can be characterized by the equation:
TJ = TS + TM(e-t/x )
TJ = the junction temperature and
TS = the heat-sink temperature.
The above equations are based on ideal, controlled scenarios and should be considered, but do not govern the response of a complicated system assembly with more complex geometry and properties. However, it should be noted that the influence of the longer thermal time constant of the housing geometry initially results in minimal temperature recovery of the housing after each pulse cyclecompared to the thermal time constant of the diode that allows it to recover relatively quickly. The stored heat in the housing affects the transient response of each subsequent cycle, such that the initial on-pulse temperature profile may have higher temperatures. Under certain conditions, this may cause thermal runaway; however the response may also reach a pulse-to-pulse equilibrium. Figure 7 shows some typical thermal profiles occurring at the end of the power-on portion of the cycle and the end of the power-off portion, respectively.
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Using a thermal imaging camera, only the temperatures on the outer surfaces seen by the camera can be read. Due to the typical fine geometry of the p-region thickness, the model's Tmax and Tjunction values are considered to be the same. As a quick check, the average temperature as seen on the thermal imaging camera is compared to the average maximum temperature from the model results. If the thermal response is carefully characterized by analyzing model results, then a relationship between the boundary temperature, average temperature, and peak temperature can be established. A test technician or engineer can then monitor, using thermal imaging, the average temperature of a pulsed condition and estimate of the peak temperature levels that will occur but cannot be measured. This sort of capability can be utilized to increase the confidence of maintaining peak temperatures below the +150oC Tjunction high-reliability limit. Accurate, proven thermal models may be modified easily such that the limiting factors of power levels, pulse duration, duty cycle, and boundary conditions may all be manipulated to define matrices of maximum conditions for given designs. This technology helps drive the boundaries of high-power PIN diode switch design outward.
High-power switch designs at Micronetics typically undergo this thermal management process of modeling and imaging. Imaging helps to fine tune the models for improved accuracy. Every new design, no matter how benign, will undergo a thermal image as a precautionary measure as sometimes an unexpected element in a design will get hot under high-power conditions. Sometimes this can be as simple as a ground return coil or current- limiting resistor, not necessarily a critical element such as a PIN diode. For some critical programs, thermal imaging is part of the Acceptance Test Procedure (ATP) so 100 percent of the products will be imaged.
1. M. Asheghi, K Kurabayashi, R. Kasnavi, and K.E. Goodson, "Thermal Conduction in Doped Single-Crystal Silicon Films," Journal of Applied Physics, Vol. 91, No. 8, April 15, 2002, pp. 5097-5088.
2. M. G. Burzo, P. L. Komarov, and P. E. Raad, "Non-Contact Thermal Conductivity Measurements of P-Doped and N-Doped Gold-Covered Natural and Isotropically Pure Silicon and their Oxides," Department of Mechanical Engineering, Southern Methodist University.
3. J. F. White, Microwave Semiconductor Engineering, J. F. White Publications, 1995.