60-GHz IPIC-QVCO Reduces Phase Noise And Error (.PDF Download)

Designing a low-power CMOS phase-locked loop (PLL) operating at 60 GHz for a direct-conversion transceiver is quite tricky. For example, it is difficult to account for low phase noise/phase error...

Register or sign in below to download the full article in .PDF format, including high resolution graphics and schematics when applicable.

Register for Complete Access (Valid Email Required)

2012 salary surveyBy registering on Microwaves & RF now, you'll not only gain access to 60-GHz IPIC-QVCO Reduces Phase Noise And Error (.PDF Download), you'll also become part of the RF engineering community.  Plus as a bonus you’ll get to a complimentary copy of The Top 5 RF Essentials compendium (PDF download) when you register now.
Joining the Microwaves & RF community also allows you to: Become a member of a group of exclusive RF Engineers.

• Start your own conversation by commenting on any article or blog
• Communicate and network with other Engineers from all over the world
• Gain access to download high quality content including schematics and diagrams where applicable.

Already registered? here.
Connect With Us

Sponsored Introduction Continue on to (or wait seconds) ×