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IBM’s researchers made considerable contributions to the 2013 IEDM program, with Mukta Farooq of the firm’s Systems & Technology Group explaining its approach to three-dimensional (3D) chip stacking, and how individual chips can communicate with each other through electrical connections. The design approaches for stacking must consider ways to enhance chip performance by increasing bandwidth, reducing wire delay, and enabling better power management.

One technique is the use of through silicon vias (TSVs) to electrically interconnect the various chips in a stack. This report reviews different ways to introduce TSVs to the manufacturing sequence for stacked chips, with attention given such key details as the diameter of the TSV, its insulating and conducting materials, and the technology node. Once TSVs have been fabricated, the final device structure must be evaluated for thermo-mechanical integrity and reliability of TSV structures.

For those seeking to learn more about emerging semiconductor-related technologies, a diversified collection of tutorial sessions is available immediately preceding the formal opening of the 2013 IEDM, on Saturday, December 7th, in different rooms within the hotel. For example, T. Paul Chow of Rensselaer Polytechnic Institute (RPI) will review the interface properties for silicon-carbide (SiC) and gallium-nitride (GaN) semiconductors, both important because of their high-power capabilities. As he will point out, to optimize the performance of these high-power semiconductor materials, achieving interface state stability is vital for reliable long-term operation.

Rob van Schaijk, R&D Manager for Sensors & Energy Harvesters at IMEC, will explore the emerging trend of self-powered electronic devices and pose various possible solutions for powering these devices. His session will compare vibrational, thermal, photovoltaic, and RF-based power-conversion methods, with a strong focus on vibration-based energy-harvesting methods—in particular, electrostatic and piezoelectric energy-harvesting techniques. He notes that the choice of energy-harvesting method depends upon the application.

Modeling and simulation will also be covered in many presentations at the 2013 IEDM. For example, researchers at the Massachusetts Institute of Technology (MIT) share their work on a physics based model for high-voltage (HV) GaN high-electron-mobility-transistor (HEMT) devices. The geometry of the model is readily scalable and uses self-consistent expressions for current and charge behavior to analyze static and dynamic behaviors. Access regions are modeled as implicit-gate transistors. The physics-based model requires a relatively small number of parameters compared to other GaN models. The MIT Virtual Source GaN FET-High Voltage (MVS-G-HV) model, as it is known, has been validated against DC current-voltage (I-V) parameters, scattering (S) parameters, and breakdown and pulsed measurements of actual fabricated devices.

Admittedly, a great deal of the 2013 IEDM program is devoted to advances in memory and digital technologies. But as all of the preceding makes clear, there is also a large amount of content on RF/microwave-related semiconductor technologies, from circuits operating with low power consumption to those operating at millimeter-wave and optical wavelengths.

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