Download this article in .PDF format
This file type includes high resolution graphics and schematics when applicable.

Currently, there are two main technologies that are being implemented and explored for mainstreaming: an advanced die-integration technique using a silicon interposer for an electrical interface, known as 2.5D, and 3D die stacking with TSVs. 2.5D IC integration has the potential to deliver much tighter form factors than standard packaging systems by mounting multiple dies—potentially even dies from different technologies, such as analog, digital, and RF—on a common silicon interposer substrate (Fig. 2). The interconnect wires for the dies are routed through the interposer with the system inputs/outputs (I/Os). Power connections are connected to the underlying package with TSVs, which is an advancement over the flip-chip wire-bonding techniques that are presently used.

3D Integrated Circuits Show Extreme RF Potential, Fig. 2

Many consider 3D die stacking to be the technology that offers greater benefit. To create effective 3D stacks, the silicon wafers must be thinned less than 50 μm. The TSVs that interconnect between the layers can then be can be etched into the substrate, like the example in Figure 3. In a heterogeneous system, the bottom die would utilize a silicon interposer much like the 2.5D IC systems. The much smaller footprint, heightened integration, and potentially more streamlined processing of the 3D ICs make them an attractive option. But many production difficulties must be accounted for, such as producing consistent thinned wafers, handling the heat generated by the stack, testing the stack, and managing reasonable yields.

3D Integrated Circuits Show Extreme RF Potential, Fig. 3

Most of the 3D-IC focus has been on stacking digital blocks to increase data rates, decrease power use, and increase digital density. There are several fabrication facilities and product lines that already utilize early 3D IC technologies to great effect, such as the Xilinx Virtex-7 2000T FPGA.

What Does All This Mean For The Wireless World?

Right now, there is not much in the way of actual products or device solutions, but the future holds a great deal of promise. The benefits for mobile applications—smaller, faster, cheaper, lower power, and more integrated—are right in line with the direction that the industry is taking with WPEDs. The ability to connect several RF die from different technologies with the precision interconnect and small size of IC fabrication processes would be a big win for an industry that has to constantly downsize its footprint. Naturally, this is driving research, modeling, and simulations of 3D IC TSV systems for RF use. With technical papers titled “Characterization of High Performance CNT-based TSV for High Frequency RF Applications” and “Through-Silicon Via Technologies For Interconnects in RF MEMS,” one can imagine that a lot of uses are being found for 3D IC technology. Examples include passive components that span multiple die and even using the TSVs as waveguides, filters, and antennas for millimeter-wave applications.

Download this article in .PDF format
This file type includes high resolution graphics and schematics when applicable.