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Dual-Channel ADC Digitizes At 3 Gsamples/s

June 24, 2016
Thanks to its 3.0-Gsample/s-per-channel sampling rate, this dual-channel analog-to-digital converter can process input signals to 4 GHz and higher.

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High-speed digitizers are changing the way high-frequency systems designers approach receiver architectures. Rather than rely on the traditional mixer-based frequency-conversion receiver layout, high-performance analog-to-digital converters (ADCs) make it possible to eliminate some or all mixer stages. In fact, they open the door to a direct-conversion receiver approach, whereby input signals are filtered, amplified, and then digitized (see "Advantages of High-Speed ADCs" below).

The model ADC32RF45 developed by Texas Instruments is just such a high-performance ADC, and will likely draw the attention of more than a few direct-conversion receiver designers. The dual-channel, 14-b ADC (Fig. 1) operates at 3.0 Gsamples/s per channel, supporting processing of input signals to 4 GHz and instantaneous bandwidths of 1.5 GHz per channel.

1. The ADC32RF45 is a high-speed, dual-channel ADC that can digitize input signals to 4 GHz and beyond.

The per-channel sampling rate effectively enables digitization of modulated input signals from dc to 1.25 GHz, such as phase-modulated quadrature signals with in-phase (I) and quadrature (Q) signal components. In this fashion, a designer can capture a total of 2.5 GHz of signal spectrum (bandwidth). By packing this much processing power into one component, depending on frequency, a receiver designer can essentially eliminate at least one intermediate-frequency (IF) stage, reducing the receiver’s component count and effectively shrinking the size of the receiver circuit board.

Simplifying Wideband Receivers

The wideband ADC enables the design of direct-sampled communications receivers or S-band radar receivers. The component’s buffered analog inputs feature on-chip terminations for uniform input impedance across the wide input frequency range. The close impedance match contributes to minimizing sample-and-hold glitch energy.

The ADC includes a pair of dual-band digital downconverters (DDCs). Each of the ADC’s channels can be connected to a dual-band DDC with as many as three independent 16-b numerically controlled oscillators (NCOs), available on chip per DDC, to implement phase-coherent frequency-hopping receivers for advanced spectrum monitoring and signal-intelligence (SIGINT) applications. The ADC is loaded with additional complementary components, including front-end peak and root-mean-square (RMS) power detectors and alarm functions to support external automatic-gain-control (AGC) circuitry and algorithms for stable ADC operation.

The digitizer achieves a robust dynamic range, with a noise spectral density of –155 dB full scale/Hz and signal-to-noise ratio (SNR) of 58.5 dB at a 1.8-GHz input frequency. It accepts input signals to 1.35 V p-p. The two channels are fully independent, with typical channel isolation of 95 dB for a 1.8-GHz input signal. In the time domain, the aperture jitter is an almost negligible 70 fs.

“Accessory” components include a front-end amplifier for input signal gain, and dc-dc converters to efficiently power the digitizer. In addition, the firm offers an evaluation module (EVM) for the ADC32RF45 (Fig. 2). The EVM includes a clock source and voltage regulators to provide the proper power supplies for the ADC as well as a Universal Serial Bus (USB) port for connection to a user’s personal computer (PC). Also, the company’s TIDesigns group developed at least four reference designs (with more information available on the website) as starting points for circuit and system designers, including a 1-GHz sampling receiver.

2. The ADC32RF45 evaluation module comes with a power cord and USB cable for immediate testing of the ADC’s capabilities.

Advantages of High-Speed ADCs

At one time, analog-to-digital converters (ADCs) were mainly for use at audio frequencies, where the earlier technology provided the means of converting analog inputs to digital code. However, as the technology, and the circuit-fabrication techniques to implement it, continues to mature, devices like the ADC32RF45 are emerging with capabilities to convert higher and higher analog input frequencies to digital words representing samples of those analog signals.

With complementary hardware, such as digital signal processors (DSPs) and digital filters, the captured input signals can be revitalized in the digital realm and brought back to analog form via a sufficiently wideband and high-speed digital-to-analog converter (DAC). As with any high-frequency/high-speed component, specifying an ADC for an application is largely a function of understanding the key ADC performance requirements.

Three main starting points for selecting an ADC are sampling rate, bit resolution, and bandwidth. A bit is the fundamental unit that represents digital words, typically with a value of 0 or 1. Higher resolution means more digital bits are used, in the case of an ADC, to represent an analog input waveform. An 8-b ADC, for example, will provide rougher approximations of an analog input waveform than a 12- or 16-b ADC, although the higher bit resolution also requires larger memory storage.

An ADC’s sampling rate is the frequency of the clock oscillator or source that determines how many samples will be taken during a sinewave period, capturing the frequency and voltage of the sinewave at those sample points. According to Nyquist-Shannon sampling theory, at least two samples per period of a waveform are needed to represent that waveform in digital form. In the case of the ADC32RF45, its sampling rate of 3.0 Gsamples/s allows representation of signals to one-half the sampling frequency, or 1.5 GHz, with the sampling rate divided by two—known as the Nyquist frequency—for a given ADC.

The terms “undersampling” and “oversampling” are often used with ADCs, to refer to cases where less or more than two samples per waveform period, respectively, are used to capture an analog signal in digital form. For a case where an input frequency to an ADC is less than the Nyquist frequency, more than two samples will be saved per input waveform period and thus will capture the correct frequency characteristics.

When the input frequency is greater than the Nyquist frequency, less data is captured regarding the input signal, causing a phenomenon known as aliasing. When aliasing occurs, analog input frequencies are translated into lower frequencies in the digital realm. This effect can actually be useful in some systems, as a form of frequency conversion (as with an analog frequency mixer).

These are just a few of the ADC’s performance characteristics. As the speeds of these components increase, they are more likely to be found in the front-ends of RF/microwave receivers, where such characteristics as signal-to-noise ratio (SNR), spurious performance, and harmonic levels come into play. An excellent review of ADC characteristics, “High-Speed Analog-to-Digital Converter Basics,” written by Chris Pearson of Texas Instruments, is available on the company’s website.

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About the Author

Jack Browne | Technical Contributor

Jack Browne, Technical Contributor, has worked in technical publishing for over 30 years. He managed the content and production of three technical journals while at the American Institute of Physics, including Medical Physics and the Journal of Vacuum Science & Technology. He has been a Publisher and Editor for Penton Media, started the firm’s Wireless Symposium & Exhibition trade show in 1993, and currently serves as Technical Contributor for that company's Microwaves & RF magazine. Browne, who holds a BS in Mathematics from City College of New York and BA degrees in English and Philosophy from Fordham University, is a member of the IEEE.

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