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Examples of the company’s product performance capabilities include devices in the Digital-RF™ family, such as the advanced digital receiver (ADR) which provides direct high-speed digitization of RF signals and improved sensitivity and interference handling compared to room-temperature RF/microwave receiver electronics. These receivers are used for a variety of satellite communications (satcom) tasks and signal intelligence applications. The company’s Digital-RF™ receivers operate with broadband digitization at RF/microwave frequencies for multiband, multichannel operation, including 100-dB spurious-free dynamic range (SFDR) for improving performance in satcom systems.

Essential capabilities today include direct digitization at frequencies up to 20 GHz. The superconductor technology has enabled DSP components at clock rates exceeding 100 GHz. The technology helps maintain spectrally pure signals throughout digitization through the use of high-speed clock rates, with low noise and high sensitivity.

Several years ago, in collaboration with Stony Brook University, HYPRES demonstrated the world’s fastest arithmetic logic unit (ALU), an 8-b, 20-GHz circuit fabricated using HYPRES standard four layer niobium based process (Fig. 2). Admittedly, superconducting circuits require special attention to packaging and maintaining the cryogenic temperature of operation. But companies such as HYPRES have shown for many applications that digital superconducting technology offers excellent performance—especially for functions (such as in ADCs and DSPs) where existing room-temperature electronics technologies (like silicon CMOS) may be reaching practical limits. HYPRES has developed its superconducting technology based on its four-layer fabrication processes, in the production of energy-efficient, high-performance digital circuits for high-speed computing applications.

2. This 8-b, 20-GHz arithmetic logic unit (ALU) was designed on the niobium-based superconducting process in collaboration with Stony Brook University.

The new six-layer (and beyond) fabrication process has been developed over several years, built with many new processes and techniques included in provisional patent application Rapid Integrated Planarized Process for Layer Extension (RIPPLE). The new fabrication process is made possible with the addition of new hardware and software, including a new lithography stepper system from Canon. This 5X reduction stepper offers fabrication of features as fine as 250 nm, and it boasts the flexibility and versatility needed to support even exotic custom device requirements.

3. The new six-layer superconducting circuit process is made possible with a 5X reduction stepper system from Canon which can fabricate device features as fine as 250 nm.

According to Daniel Yohannes, Ph.D., Director of Fabrication Operations at HYPRES, the new fabrication process brings not only added density, but performance as well. “Our new fabrication process is rapid—approximately 20% faster per layer—and is easily integrated with our current device designs by adding two new layers under the ground plane,” he says. “It is performed with one chemical mechanical polishing planarization step per layer. Moreover, the process is extensible beyond the current six layers, paving the way for a soon-to-be-announced five-year, multi-layer roadmap the company will pursue.” The process has already been extensively exercised and evaluated, with Stanford University becoming the first customer taking delivery from the six-layer process earlier this year.

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