If broadband RF transceivers can eventually be used in multi-standard, multiband, and/or cognitive radios, it is possible that one radio could serve a multitude of applications. Take, for example, a radio operating in the lower TV bands around 100 MHz. Before such a reality comes to fruition, however, several issues need to be resolved. One notable example is local-oscillator (LO) harmonics, which lead to signal corruption in the presence of large blockers. In doing so, they usually raise the receiver’s power dissipation and complexity. At the University of California, Joung Won Park and Behzad Razavi have developed a 100-MHz-to-10-GHz harmonic-rejecting low-noise amplifier (LNA). It introduces harmonic rejection in the amplifier’s front end to relax the stringent matching required for harmonic-reject mixers.

By incorporating notch and low-pass filtering techniques, the LNA is able to reject input blockers by at least 20 dB at the LO’s third and higher harmonic frequencies. Using 45-deg. phases of the LO, harmonic-reject mixers can reject the third and fifth harmonics in proportion to the matchings in the LO and RF paths. To maximize that rejection, the researchers propose a calibration algorithm. Their experimental prototype, which is realized in 65-nm digital CMOS, provides tunable rejection from 300 MHz to 10 GHz while consuming 8.64 mW from a 1.2-V supply.

Of course, phase mismatch in harmonic-reject mixers becomes more severe as higher input frequencies are considered. This problem is exacerbated by frequency mismatches in the other LO phases and among the RF paths. Here, this problem is lessened by the LNA’s attenuation of blockers at the LO harmonics.

The researchers used a number of frequency-response shaping techniques together with the calibration algorithm, which allowed the rejection frequency to be tuned over the given range. To calibrate the notch for the frequency of the possible blocker at the third LO harmonic, for example, the receiver sets the LO frequency to that blocker rather than the desired input frequency. As a result, a small fraction of the LO signal is fed to the LNA. The resulting DC value is digitized by the baseband analog-to-digital converter (ADC) and then fed as an error to a least-mean-square (LMS) machine, which controls the capacitor settings. By adjusting the notch frequency, the loop drives the error toward zero. See “A Harmonic Rejecting CMOS LNA for Broadband Radios,” IEEE Journal Of Solid-State Circuits, April 2013, p. 1072.