The operating-gain design method gain provides higher levels of gain than earlier design approaches, although it may not guarantee unconditional stability.
Amplifier designers have so far learned about the use of the unilateral gain design approach as well as a method for achieving simultaneous conjugate matching of a stable transistor's input and output ports to its source and load. This month, the article series focuses on a method corresponding to the operating gain design approach in which particular load impedance is specified for an amplifier design.
For the 50-Ω loaded amplifier, for the unilateral amplifier designs, and for the simultaneous conjugate match design, the transducer gain (GT) definition was applied. For a network described by S-parameters, two other commonly used gain definitions are used (p. 213 of ref. 1): the operating gain (GP) and the available gain (GA), which are special cases derived from the transducer gain:
where:
and
and
The three gain definitions (Fig. 1) can be expressed in terms of the S-parameters and the reflection coefficients of the network, source, and load.1,2
The transducer gain is provided by
or
The operating gain can be calculated by
The available gain can be determined by
where:
and
The operating gain design is used with a matched source and optional load. The design is exact, and S12 is not neglected. The operating gain procedure consists of selecting a ΓL value from constant gain circles (to be presented shortly) and then finding the corresponding input match, ΓS.
The operating gain method is particularly useful in the case of power amplifiers, for which a specific load impedance for the transistor is often required for maximum power output. The load, ZL, is typically specified by the transistor manufacturer as that which was found empirically to yield the highest power output for the device at a given frequency. Other applications for this method arise in which the ZL is predetermined, perhaps by the input impedance of a subsequent filter.
Unlike the unilateral gain and simultaneous conjugate match designs, the mathematics of the operating gain method do not require an unconditionally stable network. However, if the amplifier is not unconditionally stable, care must be taken that the chosen ZS and ZL values do not lie within or too near the impedances that cause potential instability. Furthermore, if the design is applied with a potentially unstable network, there will be no safeguard against the network oscillating when the designed ZS and/or ZL may be absent, as might occur when the intended source or load is disconnected. Therefore, while the operating gain method can be used with potentially unstable networks, good engineering practice suggests that one first make the network unconditionally stable if this can be done while satisfying the amplifier's performance requirements.
The operating gain can be rewritten as1
where:
and
These relations yield circles in the ΓL plane (the Smith Chart) having constant gain. The circles are described by
where the center of the circle CP is located at
and the radius of the circle is
The procedure to design to a given transducer power gain, GT = GP. is:
where:
Using the equations above, these steps can be performed manually. Alternatively, they can be accomplished using the network simulator. Constant gain circles, obtained using the Genesys3 software simulation suite from Eagleware Corp. (Norcross, GA) in increments of −1, −2, −3, −4, −5, and −6 dB below the optimum load, ΓM (which gives the simultaneous conjugate match), as shown in Fig 2. These are calculated for the 2N6679A transistor alone (described in Part 1)—without any stabilizing circuit elements.
Notice that the load instability circle (the shaded circle) lies partially within the |Γ| ≤ 1 circle of the Smith chart. The network simulator does this to indicate that these are unstable load impedances to be avoided in the selection of ΓL. Suppose a point on the −1-dB circle is selected corresponding to the normalized impedance zL = 1+ j1.6. This means that we must load the transistor with an unnormalized impedance of 50 +j80 Ω. This choice is convenient, since the 50-Ω resistive part is already included in the matched termination. An inductor provides the reactance:
L1 = 80 Ω/(6.28 Ω/nH) = 12.74 nH
The resulting circuit is shown in Fig. 3.
Next, the input impedance, ZIN, required for the − 1-dB gain must be determined, using the network simulator for the calculation (Table 1). The required source impedance is the complex conjugate of ZIN, thus
ZS = ZIN*
ZS = ZIN* = 4.133 Ω + j1.448 Ω.
A quarter-wave impedance inverter4 can be used to obtain the real part. Its characteristic impedance, ZT, is
ZT = 0.5 = 14.38 Ω
The required reactive part of ZS can be obtained with a series inductor, L2, is
L2 = 1. 448 Ω/(6.28 Ω/nH) = 0.23 nH
The complete circuit and performance is shown in Fig. 4. The gain at 1 GHz is 22.4 dB, higher than that obtained when input and output were matched with the stabilized 2N6679A circuit. As expected, the input circuit is matched, |S11| ≤ −20 dB, but the output is not matched,, and this mismatch results in a 23-percent power loss or about 1.1 dB. However, to obtain this additional gain would require selection of a load quite near those that cause potential instability.
This operating gain result might appear to be preferable to the simultaneous conjugate match and unilateral designs performed earlier. It has more gain at 1 GHz, and also has far more gain below 1 GHz, should that prove desirable. However, this design did not provide unconditional stability, as was provided by the earlier designs.
Rechecking the K and B1 values (Table 2), it is found that the amplifier that was designed is potentially unstable from 100 to 1500 MHz. Checking the instability circles (Fig. 5) confirms this fact. However, the amplifier will be stable if 50-Ω source and loads are used, since none of the input and output instability circles includes the origin of the Smith Chart.
For low-noise amplifiers, optimum performance generally consists of achieving the lowest noise figure possible for the highest possible gain. This requires specifying a particular source impedance for the transistor, using a method called the available gain design approach, which will be detailed next month in Part 6 of this amplifier design series.
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