Frequency agility is a key requirement for a variety of military systems, including electronic warfare (EW), electronic countermeasures (ECM), secure communications, and electronic intelligence platforms. For these systems, conflicting requirements in technical performance, power management, packaging, and environmental survivability often give rise to interesting and innovative designs. The engineers at Narda Microwave-East resolved these conflicts with the model 10512 signal source, currently available for applications to 3 GHz. It employs a unique mix of custom and standard components, novel printed-circuit-board fabrication techniques, and digital implementation of traditionally analog functions to produce a DSP-based, programmable arbitrary FM signal source with dual highly linearized voltage-controlled oscillators (VCOs).
The unique model 10512 signal source (Fig. 1) can be used as a fasthopping signal generator, as a programmable noise source, or as an arbitrary signal generator. Current units operate to 3 GHz, but the bandwidth is determined by the choice of VCO at the core of the unit. For more applications, the output frequency of the 10512 will be upconverted to the required operating range. The 10512 manages to squeeze into a smaller footprint and use less power than conventional signal sources by using digital circuitry for functions traditionally performed by discrete analog components. It can be reprogrammed to meet customerspecific demands with no disassembly or hardware rework. Final alignment of a sealed, fabricated unit is performed digitally, eliminating the tuning required with an analog design.
The 10512 employs two VCOs and a high-speed, PIN-diode-based singlepole, double-throw (SPDT) switch for optimized changes in frequency (Fig. 2). For example, one VCO can operate at one frequency in a band while the other is "staged" to operate at a higher frequency. By "ping-ponging" the two VCOs, it is possible to hop between frequencies much faster than by retuning a single VCO. The tuning time for a single VCO is less than 100 ns, but switching time between two pretuned VCOs via the high-speed switch is less than 15 ns. The model 10512 digitally creates a broad array of complex frequencymodulated "noise" waveforms (ramp, sinusoidal, triangle, square wave, and random, among others) that can be applied to each carrier. The characteristics of the noise waveforms, including video bandwidth, dispersion bandwidth (to 400 MHz), power level, and other parameters, are programmed either directly by the user or by a host system. Each carrier's frequency can be changed by as much as 50 MHz in less than 100 ns using the current VCO. Larger frequency excursions are possible with slightly longer settling times.
For adjusting signal amplitude, each channel utilizes a digitally controlled attenuator (DCA) with 63-dB range controllable in 1-dB steps. The DCAs settle between any two states in less than 100 ns. The model 10512 nominally delivers +16 dBm RF output power with 1-dB gain compression point of +21 dBm. The system exerts real-time control over all signal parameters, maintaining them within tight tolerances over a broad range of operating conditions.
Frequency accuracy and linearization is achieved by a blending of analog design techniques and digital functionality based on a field-programmable gate array (FPGA). The result is temperature- compensated frequency stability without a power-hungry oven and VCO linearity far superior to that of a standard VCO. In addition, Narda-developed proprietary circuit board fabrication techniques to significantly improve packaging density while increasing the maximum usable frequency. The entire system is enclosed in a 4 x 4 x 0.6 in. hermetically sealed housing that weighs less than 14 oz. and requires less than 11 W of DC power (see table). Higherfrequency operation is possible through the addition of frequency converters, for use in digital RF modems, fast-switching synthesizers, and any system requiring frequency agility.
Model 10512 is based on a VCO capable of settling in about 27 ns after a 70-MHz step. Time added by digital "housekeeping" brings the final switching time to about 100 ns or less. Each VCO has its own regulator and driver stage, the latter a stable, high-speed, low-noise operational amplifier without speed-reducing low-pass filtering.
Achieving amplitude control in the model 10512 was something of a learning process, requiring some education on DCAs. The design goal for the 15012 was a control range of 0 to 63 dB in 1-dB steps and 100-ns settling time to within 90 percent of the final amplitude value and at low operating power. Unfortunately, commercial fast-settling PIN diode 6-b DCAs were not an option, since they typically consume about 3 W of power, with the power requirements of two DCAs more than one-half of the 10512's design power budget.
DCAs based on FET and pHEMT switches initially showed promise because of their low power consumption and fast 20-to-80-percent settling times. But measurements indicated much longer times needed to reach 90 percent settling time for many of these devices. A typical FET switch, for example, can settle to 80 percent of its final value in 3 ns. However, because of an effect known as gate lag, some switches can require from tens to hundreds of microseconds to settle from their 80 to 90 percent points. Moreover, for all six stages to settle to an aggregate 90 percent point, each stage in the cascade must settle far beyond its 90 percent point, even though all are commanded in parallel. Consequently, a 6-b DCA built from seemingly fast "3-ns" RF switches would fall far short of the 100- ns performance goal. Only after evaluating many components from several vendors did Narda's design team identify a GaAs pHEMT SPDT switch with 6-b resolution and low-power operation capable of 100-ns switching speed.
To achieve the required high performance within a small enclosure, a special circuit board fabrication technique was developed that mimics conventional single-layer, substrate-on-carrier type construction. The RF circuit traces are on the top layer and distribution of control signals and power supply voltages is made by connecting the "layer one" traces and "layer three" traces by plated-through viaholes. By removing the substrate material between the first and second layers during fabrication (exposing the second layer's RF ground), pockets are created in the first layer dielectric where devices can be placed. The depth of each microstrip pocket is about equal to the height of the active device being installed. The approach contains several extra processing steps to mask and clean the pocket walls, eliminating the possibility of discontinuities or short circuits that might otherwise occur from unintentional plating of the edges of the pockets during the PCB viahole plating process. The process yields RF transitions with high maximum usable frequency. The ground plane is simply the ground layer of the multilayer board and the RF circuit performs the same as a single-layer microstrip.
The 10512's modulation source features an FPGA from Xilinx (www.xilinx.com) to facilitate programmability. It also supports real-time temperature compensation and linearization. A linearization calibration table is stored for each of eight temperatures over the operating range of the unit and a temperature sensor is read once per second. The FPGA accommodates tune count updates at 60 MSamples/s. The results are interpolated and applied to an output digital-to-analog converter (DAC) at 60 Msamples/s. This approach achieves ovenized-type temperature stability without the size and power consumption of an oven. Replacement of conventional analog video filters and video attenuators in the modulation signal processing chain with digital signal processing (DSP) blocks in the FPGA reduces size as well.
Generating the required modulation bandwidth typically requires a video filter whose output is scaled to achieve the required RF bandwidth. To accommodate numerous bandwidths, a switchable bank of filters is required, the output of each filter shaped to obtain uniform power spectral density. The model 10512 uses a digital implementation of this approach. A pseudo-random number generator and linear feedback shift register (LFSR) generate a digital random sequence. As a deterministic sequential state machine, the LFSR cannot generate truly random numbers the way a diode can, but if the pseudorandom sequence is repeated over a long enough period, an effectively random result can be provided. The long LFSR output is passed through a digital lowpass filter bank and shaping is applied to create uniform distribution with a high-speed look-up table. A digital multiplier block provides programmable frequency excursions.
As a clean source of arbitrary noise waveforms, model 10512 can be used in a wide array of applications including calibration and testing of communications, ECM, EW, and radar systems. Standard units operate to about 3 GHz, although the design is applicable at higher frequencies with a different complement of VCOs. The lightweight unit consumes little power and is rugged enough to meet military specifications for shock and vibration.
Narda Microwave- East, 435 Moreland Rd., Hauppauge, NY 11788; (631) 231-1700, Internet: www.nardamicrowave.com/east.