Ultrawideband-Communications technology promises high data rates with low transmit power levels over short distances. To be effective, however, such systems require effective, low-cost pulse generators. For that reason, Che-Fu Liang and S.-I. Liu of the Graduate Institute of Electronics Engineering and Department of Electrical Engineering of the National Taiwan University (Taiwan, Republic of China) and S.T. Liu of MaxRise (Hsinchu, Taiwan, Republic of China) developed a CMOS pulse position generator. It provides a data rate of 100 Mb/s and pulse width of 1 ns in UWB communications systems. To achieve accurate pulse position and pulse width, the generator employs a mixed-mode calibration circuit to calibrate the output buffer of the generator’s delay-locked loop (DLL).
The pulse generator was fabricated with a 0.35-micron CMOS process. It dissipates 180 mW power from a +3.3-VDC supply. It consists of a DLL with 10 delay cells, a mixed-mode calibration circuit, 11 variable delay buffers (VDBs), and a pulse generator. With an input reference clock of 100 MHz, 1-ns spacing can be produced between adjacent delay cells. The mixed-mode calibration circuit senses the spacing among output pulses and calibrates the delay time according to the desired spacing of 1 ns.
Measurements showed the pulse generator to achieve the 1-ns pulse width and spacing with a mere ±4 percent error. The measured root-mean-square (RMS) jitter was only 3.35 ps while the peak-to-peak jitter was only 24.9 ps as measured with a model 86100B oscilloscope from Agilent Technologies (www.agilent.com) and its internally generated 231 – 1 pseudorandom-bitsequence (PRBS) test signal. See “Calibrated Pulse Generator for Impulse-Radio UWB Applications,” IEEE Journal of Solid-State Circuits, November 2006, Vol. 41, No. 11, p. 2401.