|The ADS42xx family of high-performance analog-to-digital converters provide 12- and 14-b resolution at sampling rates to 250 MSamples/s, with low power consumption from a single +1.8-VDC supply. |
Signal sampling is performed across a wide range of applications, but many systems specifically require sampling with extremely low power consumption. For such applications as Fourth-Generation (4G) Long-Term-Evolution (LTE) cellular base stations, software-defined radios (SDRs), and in portable test equipment, the ADS42xx family of high-speed analog-to-digital converters (ADCs) from Texas Instruments samples at rates from 65 to 250 MSamples/s while delivering as much as 14-b resolution, yet consumes very little power in the process (see figure).
The new data converter family boasts eight dual-channel members with about one-third of a watt or less power consumption for most models (see table). One of the higher-speed ADCs, 14-b model ADS4246, consumes 332 mW total power at a sampling rate of 160 MSamples/s. Designed for use with a single +1.8-VDC supply, it can handle maximum analog input signals to 400 MHz at 2-V peak-to-peak (pp) amplitude swings, and maximum analog input signals to 600 MHz at 1-Vpp amplitude swings.
The highest-speed, highest-resolution member of the family is model ADS4249, which is rated for a maximum sampling rate of 250 MSamples/s with 14-b resolution. It can process analog input frequencies to 400 MHz at 2 Vpp and to 600 MHz at 1 Vpp. With its low-speed mode enabled, it operates at clock rates from 1 to 80 MSamples/s. With the low-speed mode disabled, the ADS4249 operates at clock rates from 80 to 250 MSamples/s. From a single +1.8-VDC supply, it consumes a mere 183 mW at a sampling rate of 65 MSamples/s, 277 mW at a sampling rate of 125 MSamples/s, and 332 mW power at a sampling rate of 160 MSamples/s.
The ADS4249 also delivers on electrical performance. It features a typical signal-to-noise ratio (SNR) of 72.2 dB full scale (FS) with a 100-MHz input signal. It achieves a typical signal-to-noise-and distortion (SINAD) ratio of 71.6 dB FS with a 100-MHz input, and a spurious-free dynamic range (SFDR) to -82 dBc with a 100-MHz input signal. The converter has two-tone intermodulation distortion (IMD) of typically -84 dBc FS when tested with tones at 185 and 190 MHz at levels of -7 dB FS. The total harmonic distortion (THD) for the converter is -79 dBc when tested with a 100-MHz input signal.
|The ADS42xx family of ADCs at a glance.|
|Model||Resolution (b)||Sampling rate (MSamples/s)||Maximum analog input (MHz)|
|ADS4222||12||65||400 at 2 Vpp, 600 at 1 Vpp|
|ADS4242||14||65||400 at 2 Vpp, 600 at 1 Vpp|
|ADS4225||12||125||400 at 2 Vpp, 600 at 1 Vpp|
|ADS4245||14||125||400 at 2 Vpp, 600 at 1 Vpp|
|ADS4226||12||160||400 at 2 Vpp, 600 at 1 Vpp|
|ADS4246||14||160||400 at 2 Vpp, 600 at 1 Vpp|
|ADS4229||12||250||400 at 2 Vpp, 600 at 1 Vpp|
|ADS4249||14||250||400 at 2 Vpp, 600 at 1 Vpp|
The data converters are backed by a wide range of tools, including an evaluation module for each ADC model; an Altera-compatible high-speed mezzanine connector; and Xilinx-compatible field-programmable-gate-array (FPGA) mezzanine connector, allowing the ADS42xx evaluation modules to mate to FPGA evaluation modules for ease of system-level design and prototyping. The company also offers Input/output-Buffer-Information-Specification (IBIS) models for each data converter to verify signal-integrity (SI) requirements for critical applications, as well as numerous software tools.
The low-power ADCs are each housed in 9 x 9 mm, 64-pin QFN packages and rated for operating temperatures from -40 to +85C. Pricing information is available at the website below.
12500 TI Blvd.
PO Box 655303
Dallas, TX 75265