Transistor trackers have found a wealth of information for more than 50 years at the IEEE's International Electron Devices Meeting (IEDM). Scheduled this year (December 5-7, 2005) at the Hilton Washington Hotel (Washington, DC), this premier conference for semiconductor advances features a strong lineup of new discrete devices, integrated circuits (ICs), microelectromechanical-systems (MEMS) devices, and computer models for devices, supported by the world's most advanced process technologies.

With its strong international flavor, the 2005 IEDM features 250 technical presentations from corporations, universities, and government laboratories around the world. According to the IEDM 2005 Publicity Chairman, Thomas Bonifield (also Interconnect Development Manager and TI Fellow at Texas Instruments, Dallas, TX), "If you want to know where the electronics industry will be in three-to-five years, there's no better oracle than the IEDM because the building-block devices and technologies for future electronic products are addressed in the technical program."

The technical program opens with a trio of plenary talks: IEDM 2005 will open with three plenary talks: "Scaling, Power and the Future of CMOS," by Professor Mark Horowitz of Stanford University and Rambus, Inc.; "Past and Future of Information Displays," by Dr. Kouji Suzuki of Toshiba Corp. and SED, Inc.; and "More Than Moore: Micromachined Products Enable New Applications and Open New Markets," by Benedetto Vigna of ST Microelectronics.

Of interest to RF/microwave engineers, M.B. Willemsen and R. van Langevelde of Philips Research Laboratories (Eindhoven, The Netherlands) introduced a new model for high-voltage RF LDMOS transistors which features the effects of partial lateral depletion in the device drift region (a phenomenon not included in other models) in order to describe capacitances and RF behavior. To solve for the value of internal drain voltage, the researchers add a condition of lateral electric field continuity. The new model provides DC characteristics in good agreement with measurements and proven existing models and modeled Y-parameter bias sweeps that are in good agreement with device simulations and measurements under all operating conditions.

Gary Fedder of the Department of Electrical and Computer Engineering and the Robotics Institute of Carnegie Mellon University (Pittsburgh, PA) explored the development of CMOS MEMS technology for the fabrication of resonant mixer-filters with near 0-dB insertion loss and sub-milliwatt power consumption. The approach was demonstrated in a dual cantilever resonant mixer-filter with 1.3-m electrostatic gaps. By setting a voltage of +12.5 VDC on one resonator and -6.5 VDC on he other resonator a differential signal is produced. The mixer-filter device offers response that remains essentially unchanged for RF and local-oscillator (LO) frequencies from 10 to 400 MHz. The mixer functions at frequencies as high as 3.2 GHz, although with some feed through from on-chip capacitive coupling.

Additional MEMS research was reported by Yu-Wei Lin and associates from the Center for Wireless Integrated Micro Systems at the University of Michigan (Ann Arbor, MI). Their MEMS-based wine-glass disk oscillator achieves an improvement of 13 dB in phase noise over an earlier 60-MHz MEMS resonator oscillator by replacing the single resonator normally used in the design with a mechanically coupled array to effectively raise the power-handling capability. The researchers report that a mechanically coupled array of nine 60-MHz wine-glass disk resonators embedded in a positive feedback loop with a custom-designed, single-stage, zero-phase-shift sustaining amplifier achieves phase noise of -123 dBc/Hz offset 1 kHz from the carrier. When divided down to 10 MHz, this phase-noise performance effectively corresponds to -138 dBc/Hz which effectively corresponds to -138 dBc/Hz. This resonator array oscillator offers the full integration of the sustaining amplifier circuitry with the oscillator and boasts low power consumption of only 350 W. The -138 dBc/Hz phase noise exceeds by 8 dB the stringent oscillator phase-noise requirements for GSM.

Jing Wang and associates from the University of Michigan's Center for Wireless Integrated Micro Systems reported on achieving good frequency tolerance across a wafer for RF micromechanical disk resonators in nanocrystalline diamond and polysilicon structural materials. Resonance frequency absolute and matching frequency tolerances have been demonstrated across 4-in.-diameter wafers fabricated at the university in the range of 1000 and 300 PPM. The measured matching tolerance is good enough to allow implementation of 0.5-percent bandwidth preselection or image-reject filters for wireless applications without the need for frequency trimming. When comparing simulations to measurements for the frequency responses of 0.1- and 0.5-percent bandwidth filters, with 300 PPM mismatching applied to the 0.1-percent filter the response distorts to ripple of more than 6 dB within the filter passband. But for the 0.5-percent filter with 300 PPM mismatching, the passband ripple is a respectable 0.5 dB above the design goal.

M. Agarwal and colleagues from the Departments of Electrical and Mechanical Engineering of Stanford University (Stanford, CA) discussed nonlinearity cancellation techniques in MEMS resonators for improved power-handling capabilities. The improved power-handling capability results in lower phase noise in MEMS resonator oscillators. Their analysis has guided the development of optimum resonator designs with micron-scale rather than nano-scale gaps. They have also discovered a new quantitative method for detection of critical bifurcation or duffing in MEMS resonators.

Shun Mitarai and associates from Sony Corp. (Kanagawa, Japan) reported on the fabrication of an embedded MEMS filter chip for VHF applications. Meant as possible replacements for larger surface-acoustic-wave (SAW) filters at those frequencies, the MEMS filters were embedded onto BiCMOS chips. Based on a high-performance resonator with 30-nm gap height and background noise level of -77 dB at 100 MHz, the researchers developed a 100-MHz bandpass filter with 4-MHz passband. The filter resonator consisted of 100 parallel beams and four resonator blocks connected in a lattice-type filter circuit. The measured performance after integration onto a BiCMOS silicon wafer match well with calculated values.

T. Kawakubo and co-workers from the Advanced Electron Devices Lab of the Toshiba Research Consulting Corp. (Tokyo, Japan) used a CMOS-compatible process and materials to fabricate a piezoelectric RF MEMS tunable capacitor for +3-VDC operation. The lowest tuning ratio of 3 was achieved with an operating voltage of +2.5 VDC while wider tuning ratios of 5.5 and 10 were achieved at operating voltages of +4.5 and +12 VDC, respectively. A wide continuous tuning ratio of 3 was provided with the design operating voltage of +3.5 VDC.

At larger signal levels, Gordon Ma and associates from the RF Power Products group at Infineon Technologies (Tempe, AZ) reported on LDMOS technologies for high-power RF transistors for cellular base-station applications. The presenters relate that present LDMOS technologies are capable of operating beyond 3.5 GHz with high power levels for WiMAX wireless applications. And, while emerging device technologies such as silicon carbide (SiC) and gallium nitride (GaN) have shown promising results for base-station applications, the best GaN technology still lacks the back-off efficiency performance of LDMOS for high-linearity applications.

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M. Kondo and co-workers from Renesas Technology Corp. (Tokyo, Japan) and Hitachi (Tokyo, Japan) reported on LDMOS FETs for cellular handsets based on a structure with thick-strained silicon and relaxed silicon germanium (SiGe). The structure was applied to LDMOS to improve the power-added efficiency (PAE) without increasing leakage. Devices with 70-nm-thick strained silicon exhibited 46.7-percent PAE at +27.5 dBm output power and 1.95 GHz under WCDMA modulation conditions, which is comparable to GaAs heterojunction-bipolar transistors (HBTs), and 68.2 percent with +33 dBm output power under GSM modulation.

R. Therrien and the research team from Nitronex Corp. (Raleigh, NC) reported on a 36-mm GaN-on-silicon heterojunction FET (HFET) capable of pulsed output power of 368 W at 70-percent drain efficiency. Measurements were performed at 2.14 GHz with a 300-µs pulse width and duty cycle of 1 percent and yielded 17.5-dB small-signal gain. Pulsed output power densities of more than 10W/mm with drain bias of 60 V have been achieved for the device.

M. Kanamura and associates from Fujitsu Laboratories (Atsugi, Japan) developed a novel n-GaN/n-AlGaN/GaN metal-insulator-semiconductor (MIS) high-electron-mobility-transistor (HEMT) power amplifier (PA) for WCDMA base-station applications. The single-chip GaN MIS-HEMT amplifier operates at 60 V with 110 W output power and 13-dB linear gain at 2.14 GHz. When combined with a digital predistortion system for linearity improvement, the amplifier provides adjacent-channel leakage power ratio (ACLR) of less than -50 dBc for four-carrier WCDMA signals.

R. Lossy and associates from Ferdinand-Braun-Institut fur Hochstfrequenztechnik (Berlin, Germany) developed a new transistor gate design based on the use of a powerbar, to escape the limitations of metal losses at higher frequencies and power levels. Power bars consist of as many as 11 individual power cells. Each power cell comprises eight gate fingers with a gate width of 125, 250, or 500 µm. Each power bar is connected to the transistor package by wire bonds. Using the power bars, the researchers build a packaged device with total width of 5 × 8 × 250 µm with 20-dB linear gain, 54 percent PAE. and +44.5 dBm output power with +26 VDC at 2 GHz.

Finally, Y.-F. Wu and fellow researchers from the Cree Santa Barbara Research Center (Goleta, CA) offered information on 8-W GaN HEMT devices for millimeter-wave applications. Their 100-µm-wide short-gate-length GaN HEMTs achieved 8.6 W/mm power density at 40 GHz. Scaled-up 1.05-µm-wide devices generates output power levels of 5.2 and 5.2 W with associated PAE of 36 and 31 percent at 30 and 35 GHz while a 1.5-µm-wide device delivered 8 W output power at 30 GHz with 31 percent PAE.

For more information on the conference or on registration, visit the IEDM 2005 website at www.ieee.org/conference/iedm or contact the Conference Manager, Phyllis Mahoney of Widerkehr & Associates at (301) 527-0900 or e-mail: phyllism@widerkehr.com.