PENN STATE PHILLIPS (PSP) models are part of a new transistor-model class, which was created to solve RF design challenges like the need for RF transistors to operate across a wide range of bias conditions. PSP models satisfy these requirements by computing the surface potential in the gate region of a transistor's silicon/silicon-dioxide interface. Alternatively, the Berkeley Short-channel IGFET model (BSIM)the industry's most widely used transistor modelis based on direct-current (DC) measurements of current/voltage and capacitance/ voltage relationships. Aside from having limitations for high-speed designs, the BSIM model fails to adequately capture characteristics in a transistor's sub-threshold region. In an eight-page white paper titled, "The PSP Model in RF CMOS Design," Fujitsu Microelectronics America RF strives to help designers understand how the newer PSP models relate to actual device behavior as well as how they are used in an RF process design kit (PDK).
Compared to other modeling methods, the surface potential approach underlying the PSP model uses an analysis that more closely describes the device physics of transistors. As a result, these models can more accurately predict physical phenomena like Coulomb scattering, quantum-mechanical effects, noise sources, and stress induced by shallow trench isolation (STI). The paper describes how the surface potential relationship can be formulated into an equation involving various process parameters. Known as the Surface Potential Equation (SPE), it is a form of the Poisson equation.
No matter how well the model equations describe the physics of the transistors, however, random and systematic process variations sometimes cause output-current or threshold-voltage variations. More recent PSP versions unify parameters for defining a binning, global, and local-model type into a single model type. As the fabrication process matures and more variation data becomes available, model developers can better clarify device characteristics and capture deviations with a binned model. Yet process data might reveal that global models provide accurate results for some devices. Regardless, RF circuit designers get more accurate models.
By simply including the PSP models in a PDK, designers are not guaranteed fabrication success. The paper notes that PDKs for RF design should continue to include BSIM models for legacy support. It ends with a discussion of the functionality that must be included for an RF PDK to be successful with deep-submicron CMOS technology.
Fujitsu Microelectronics America, Inc., 1250 E. Arques Ave., Sunnyvale, CA 94085-5401; (800) 866-8608, FAX: (408) 737-5999, Internet: us.fujitsu.com/micro.