Fabricating a classic broadband amplifier design with newer PHEMT devices should provide improved performance over the same MMIC amplifier based on older GaAs MESFET devices.
Distributed amplifiers offer moderate to high gain over broad frequency ranges. They have been designed with transmission lines as input and output feeds for some time. An early paper (1948) by Bill Packard (co-founder of Hewlett-Packard Co.) even showed how to use vacuum tubes for amplification in a distributed design1. As GaAs monolithic-microwave-integrated-circuit (MMIC) technology developed and different types of amplifiers were fabricated for enhanced efficiency, noise figure, and output power, the distributed amplifier remained one of the mainstays for broadband frequency coverage, such as in fiber-optic communications. Understanding how to design a broadband GaAs MMIC amplifier can still benefit numerous applications requiring wideband frequency coverage.
John Hopkins University (Laurel, MD) has offered a MMIC Design Course since 1989, having students' designs fabricated by TriQuint Semiconductor (www.triquint.com). A distributed amplifier designed by Craig Moore, who co-taught the class from 1989 through 2003, serves as one of the design examples. The early design was even tested at cryogenic temperatures to show the improvement in noise figure at liquidnitrogen temperatures2. The early design was fabricated with 0.5-m GaAs MESFET devices, which offer less gain than newer 0.5-m GaAs pseudomorphichigh- electron-mobility-transistor (PHEMT) devices. In order to demonstrate the improvements possible with these newer devices, an updated distributed amplifier was designed and fabricated using TriQuint's 0.5-m GaAs PHEMT process and charactertized along with other designs as part of the 2006 MMIC Design Course. What follows is a documentation of the design approach along with measured and simulated results for the broadband amplifier.
A distributed amplifier uses a broadband transmission line to feed the inputs of a series of active devices (Fig. 1). In parallel, another transmission line is used to sum the active device outputs. Each stage supplies a relatively modest amount of gain but the gain is spread across a wide frequency range. Gain stages add rather than multiply as in a typical cascade arrangement. When the distributed amplifier uses lumped elements to approximate a distributed transmission line as in Fig. 2, the shunt capacitors of a lumped-element transmission line are replaced by the parasitic capacitances of the transistors. The lumped-element equivalent transmission line acts like a lowpass filter with an upper cutoff frequency inversely proportional to capacitance, hence, choosing the active device size determines the upper frequency of operation. Some design trade-offs are the number of stages, the size of the active devices, type of device-if more than one type is available, and DC bias of each stage. Up to a point, more active stages means more gain-bandwidth but also more power consumption. Once the device size is chosen, a simulator is used to optimize inductor values for the best trade-off of gain, return loss, output power, and noise figure.
Since distributed amplifiers are often targeted to a number of different applications, the performance specifications are often flexible, with broadband gain as the most important design characteristic. For this design, an enhancement-mode PHEMT device was chosen since the positive gate voltage is compatible with a single positive supply or battery. Three stages were chosen to compare performance of the previous three-stage distributed amplifier MMIC of Craig Moore et al. based on a 1989 TriQuint Semiconductor 0.5-m GaAs MESFET process to the present TriQuint 0.5-m GaAs PHEMT process. Higher gain and a lower noise figure are expected with PHEMT devices. An operating voltage of 3.3 V was chosen for battery-operated applications, although the device can easily operate over a range of voltages and currents for "operational" customization. Simulations at 1.5 V and 14 mA showed only a 2 dB drop in gain with little variation in performance for gate voltages from 1.5 to 5.0 V and 14 to 35 mA of current. Simple Agilent Advanced Design System (ADS) computer-aidedengineering (CAE) software (from Agilent Technologies, www.agilent.com) linear simulations were used to choose inductance values and PHEMT size for best gain, and match.
Using the ideal simulation, a 6 X 30-m enhancement-mode PHEMT device size was chosen. Craig Moore's 1989 distributed amplifier design added some additional matching elements to the MESFET drains to make the effective output capacitance comparable to the input gate capacitance. The input and output lumped-element transmission lines would thus be symmetric and have comparable phase delays. This same matching approach with symmetric input and output transmission lines was compared to a design where the inductors on the drain line were optimized independently from the inductors for the gate line. Since the phase delay difference between the gate feed and the drain feed for this simple three stage PHEMT design was small, the simpler non-symmetric feed approach was chosen. If instead, the phase delay difference was large between the input and output transmission lines, the gain stages would not combine efficiently. Next, ideal elements were replaced with TriQuint inductors, resistors, capacitors, and interconnect for more realistic simulations. Fig. 3 shows the expected gain, match, stability, and noise figure of the final distributed amplifier design. For simulations, a bias of about 30 mA was chosen to limit the consumption to 100 mW maximum with a typical 3.3-V input, a compromise for output power and/or third-order-intercept (IP3) performance. A plot of the MMIC amplifier in a typical 54 X 54 mil square die site is shown in Fig. 4 along with probe-able PHEMT test structures, one the identical 6 X 30 m PHEMT in the distributed amplifier and the other a typical 6 X 50 m depletion-mode PHEMT.
In a typical distributed amplifier, one-half of the RF power goes into the 50-Ω termination of the output transmission line. There are some tricks such as tapered transmission line impedances to improve the output power efficiency. This new design uses simple 50-Ω impedance input and output lines. To eliminate wasted DC power, the transmission- line terminating resistors (50 Ω) have large capacitors (25 pF) in series with substrate viaholes to provide RF ground but block DC current. The large drain-supply current flows through a low resistance large inductor rather than a parallel 50-Ω terminating resistor (Fig. 5). This reduces wasted DC power due to current-resistance (IR) drop through the 50-Ω resistor but the inductor size is a performance trade-off as it sets the low-end frequency rolloff-about 1 GHz for this design. Increasing the size of this inductor will improve the low end frequency rolloff but will also increase its series resistance, wasting additional DC power. Another consideration is that a larger inductor will take up more area on the GaAs MMIC layout.
Before submitting a layout to a foundry for fabrication, the designs must pass a series of design-rule checks (DRCs). Since the first Johns Hopkins University class in 1989, ICED (ICEDitor) software has been used for DRCs based on rules supplied by TriQuint Semiconductor. Additional Layout Versus Schematic (LVS) checks are performed to compare an extracted netlist from ADS with the actual electrical connections of the design using ICED. It is possible to pass DRC checks but still have a design that contains a fatal short or a bad connection unless LVS checks are also performed. Newer versions of ADS have connectivity checking built-in to help eliminate some of these connectivity errors, but a full LVS check with a tool like ICED is worth the additional effort.
The measured performance of the PHEMT distributed amplifier is shown in Fig. 6 as well as the Table 1, with a respectable 10-percent PAE and almost +10 dBm output power at 3.3 V and 24 mA bias. Noise-figure data was also taken and compares very well with simulations as shown in Fig. 7. The best noise figure is just above 2 dB at 5 to 6 GHz, which is exceptional for an amplifier with a decade (1 to 10 GHz) bandwidth.
The 54-mil-square die had plenty of additional space for test devices including a 6 X 30-m enhancementmode PHEMT identical to the device in the distributed amplifier. This PHEMT was measured at a typical bias of 3 and 3.3 V at about 8 to 9 mA and the S-parameters were then used to re-simulate the distributed amplifier MMIC. Fig. 8 shows the layout of the PHEMT test structure and Fig. 9 and Fig. 10 show the measured data compared to simulations for the enhancement- mode PHEMT. Parasitics of the transistor in a probe-able test layout have subtle differences from the transistor in the amplifier layout, due in particular to differences in reference planes for the measured device. These subtle differences appear to be the cause of small discrepancies at higher frequencies between measured data and re-simulations using ADS and Sonnet Software (www.sonnetusa.com) simulation programs. For the individual 6 X 30-m enhancement-mode PHEMT, the measured data compares very well to ADS simulations using the TriQuint's Own Model (TOM) device model.
Modeling of MMICs can take various levels of effort. For example, should interconnects be ignored in the simulation? It certainly simplifies the simulations if interconnects are ignored and for many designs at 2.4 GHz, or below, interconnects are insignificant. Often the microstrip transmission-line models were developed for lines that are longer than a few substrate heights which is rarely the case in MMICs. Typical microstrip models tend to overestimate the "lengths" (i.e., inductances) of the lines. Should an EM simulator be used to make sure there are no undesired parasitics that are omitted in the original simulation? Simulating with an EM tool is a good idea and a useful check. However, unless one is really trying to compress a design, the standard rules of thumb of 3 to 5 linewidth separations, but not 3 to 5 substrate heights, work well.
While the individual 6 X 30- m PHEMT test cell compared well with simulated typical devices, using the measured device data in a re-simulation of the amplifier did increase the upper rolloff frequency closer to the measured results. Sonnet EM simulations were performed on the entire design- using 5-m-square resolution and the typical substrate height of 100 m. This was a relatively large simulation for Sonnet, so it was broken into two partitions of 2.5-m resolution (Fig. 11). Using the Sonnet EM simulations and measured device data, the gain, input match, and output match agree well with the measured data. The Sonnet simulations also agree very well with the ADS re-simulations (Fig. 12, Fig. 13, and Fig. 14). Note that the gain and match have similar shapes but are still slightly off in frequency at the higher end of the frequency range (10 GHz). While these discrepancies are small, it is always good to look for explanations for those differences. The Johns Hopkins University MMIC students really learn the most when their measured results are slightly different than their original simulations. Discovering the cause of those little discrepancies significantly enhances their design expertise. Having actual MMICs fabricated by TriQuint Semiconductor and tested by the students is what makes the MMIC Design course at Johns Hopkins University so special and rewarding. Support from TriQuint, Agilent (formerly EEsof), and Applied Wave Research (www.mwoffice.com) has been excellent and much appreciated for the Johns Hopkins University MMIC Design class.
The PHEMT distributed amplifier MMIC had excellent flat gain response from 1 to 10 GHz with significantly better gain and better noise performance compared to the older MESFET design. As expected, the 0.5-m PHEMTs had good gain and good noise figure at the typical 100 mW power consumption (3 to 3.3 V at 28 to 32 mA), though the bias can be varied over a moderate range (~20 to 175 mW). Resimulations with measured data using ADS and Sonnet EM software agree well with the measured data. Output Power, DC bias, and noise figure were measured and agreed well with the simulations. The design approach for a distributed amplifier of creating a lumped-element or distributed transmission-line input and output feed line which absorbs the transistor capacitances can easily be extended to other MMIC technologies and processes.
