This predictive and efficient design methodology can be applied by designers working on circuits with arbitrarily shaped structures for both commercial and military applications.
Monolithic microwave integrated circuits (MMICs) are often thought of as active devices, since they rely strongly on the capabilities of small-gate transistors and diodes. But passive elements are also an important part of these circuits, and computer simulations too often are limited in accuracy of their passive-component models, especially for arbitrarily shaped components for which no analytical models exist. In such cases, electromagnetic (EM) simulators commonly are used. What follows is a predictive and efficient approach for the design, analysis, and verification of MMIC devices that contain passive structures of any shape.
As an example, this approach will be applied to a reconfigurable (3 b × 3 b) X-band MMIC tuner with integrated microelectromechanical-system (MEMS) switches, used for optimizing the efficiency of Class E power amplifiers. This double-stub tuner is a microstrip-based design that uses six different possible radial stubs through six different MEMS switches. The tuner has a tunable impedance range of 0.63 to 57 Ω for the real part and −7.5 to 51.8 Ω for the imaginary part, with a nominal impedance around 27 + j32 Ω. The tuner can help provide high drain efficiency, on the order of 60 to 70 percent, when used for efficiency optimization of Class E power amplifiers.1
The simulation method outlined here can be applied to virtually any design and is best suited for cases where accurate models for passive components do not already exist. This approach is predictive with its use of Electronic Design Automation (EDA) software and is efficient because of artwork parameterization, EM batch simulations, and intelligent reuse of EM-based models in schematic simulations. Modern EDA platforms also support straightforward comparison of simulated and measured data using linear simulation.
The first feature of this methodology is the ability to parameterize any artwork that can be drawn in the layout environment. This can be delivered in solutions ranging from hand-coded artwork macros to artwork macros automatically generated as a result of a user's interaction with a user-interface. Modern EDA software offers both of these, sometimes in the same tool. Fortunately, complex macros can be created even though fairly straightforward and simple macros are usually all that are required. This complexity could exist in the underlying equations that are used to construct the artwork, such as that for spiral inductors that have variable arm widths and spacing or are fabricated on multiple layers, or could even exist in the flexibility of the macro to turn objects "on" or "off."
Parameterized artwork is valuable in itself, but it is really a stepping-stone to the next part of this method, which is a batch EM simulation. It is one thing to have the flexibility to change portions (or all) of a structure by simply changing the values of a parameter or parameters, but true efficiencies begin to emerge when multiple EM simulations are automated. Modern EDA tools not only provide this batch capability, but they do so in an intelligent way, by using algorithms to adaptively sweep the parameters so that the fewest number of EM simulations are run to yield accurate responses in the user-defined parameter ranges. Adaptive algorithms also are implemented for the frequency swept analysis, which also minimizes the number of simulations required to achieve the desired accuracy across a given frequency range. Without adaptive sweeps, and depending on the number of parameters and the ranges of values being swept, the result could be many hundreds of EM simulations, thus emphasizing the need for intelligent, adaptive simulation algorithms. Designers also need a way to intelligently reuse the data from these simulations. It is acceptable for one engineer to let his computer run for long periods of time to generate models that are valid over a large design space, as long as others can benefit from the time investment.
The most user-friendly solution to this batch simulation includes a graphical user interface (GUI) to enter the desired frequency ranges and additional parameter(s) to be swept. A model database containing the solutions, including at least the S-parameter results, can then be reused in future analyses. This permits designers to maintain the accuracy of EM-based models without the need to re-invoke the EM simulation engine.
Incredible benefit comes from this model database reuse. EDA tools that support placing layout components within a circuit schematic that include EM results for a portion or all of a layout greatly enhance co-simulation speed. This is particularly true when the user wants to optimize, tune, or simply sweep the layout parameters in addition to any circuit simulation parameters. The ability to leverage this EM database among more than one designer is not only desirable, but also necessary.
Design Kits are the best way for engineers to share simulation models, especially when they are accompanied by both schematic and layout representations. Foundry-provided process design kits (PDKs) offer a proven and commonplace example of the value of design kits. PDKs include simulation models, schematic symbols, and layout artwork for a specific component on a specific process. This enables designers to possess and use the most accurate core models for their designs. PDKs can easily be distributed to many different engineers because all of the relevant files are typically packaged in a single archive. Design kits created for libraries of EM-based models have this same value.
Modern EDA solutions provide the ability to easily create new design kits. This has been accomplished historically through hand-coded methods, but today, EM-based models can be added to a design kit that is created automatically through a graphical user interface. A user selects the model to be added, enters a description, and enters the name of the design kit, and then the appropriate files are created. To distribute the library in the form of a design kit, the user can then "ZIP" the directory and then send that archive file to other users who can benefit from the parameterized model(s). Some modern EDA tools even include the ability to add these custom, EM-based design kit models to a palette for easy access in a schematic environment.
After the EM-based models have been generated and are available in a design kit, any designer using the same EDA platform can use these parameterized models in schematic simulations. The benefits are threefold: (1) each model has a schematic symbol that looks like the artwork and has parameterized artwork associated with it to enable generation and update of the layout; (2) each model is a parameterized simulation component that contains EM accuracy but simulates at speeds similar to analytical models; and (3) each model allows the user to quickly sweep, tune, or optimize layout artwork (within the valid ranges of the parameters for the EM-based model) along with circuit elements to yield desired performance goals. Another advantage of using these models in a schematic simulation is that the user now has the option to use simulation-time or post-processing functionality that exists in the schematic simulation environment. This can sometimes offer more overall analysis capability than would be available in the layout/EM simulation environment; especially in the areas of optimization and design for manufacturing.
The first step for simulating the X-band impedance tuner is to create artwork that is parameterized in some way. While all of the microstrip transmission line segments (including the radial stubs) could be parameterized for this design, a fixed configuration is assumed for these elements. However, the states ("on" or "off") of the MEMS switches are parameterized in this example. A graphical macro tool available in the layout environment was used to parameterize the conductor layers that contain the objects that are used to construct the switches. Essentially, the appropriate structures were drawn in layout for the "on" state and for the "off" state and then the macro enables or disables those layers for the EM analysis based on the value entered for each switch's artwork parameter. Figure 1 shows the parameterized artwork for the microstrip tuner. Since all six MEMS switches have been parameterized, EM simulations for 64 states (3 b × 3 b) need to be run. With so many configurations to be simulated, the scenario is ideally suited to batch EM simulation.
Figure 2 shows a sample interface used to set up the batch EM simulation. Modern EDA GUIs for this kind of simulation include parameters for the EM simulator itself, which are sometimes referred to as model parameters. The user also provides inputs for the range or list of values to be swept for the layout parameters. After the batch EM simulations begin, generation of the model database also begins. Upon completion of the final simulation in the batch process, an EM-based model valid over the design space defined in the batch setup is available for use and can be shared by creating and circulating a design kit.
The design kit for this EM-based model was created using a GUI. A new icon was created and included in the palette for the newly created design kit. This design kit palette and the schematic symbol for the reconfigurable impedance tuner are shown in the schematic screen shot in Fig. 3. The EDA tool used in this case created a layout look-alike symbol for the EM-based model. The use of a palette is optional, because the models always can be accessed directly from user-defined project libraries. Now that the desired model is available for simulation, the next step is to compose a schematic diagram that can be used for any flavor of circuit simulation.
Because the new EM-based model will run at the speed of analytical models, any simulation capability offered by the EDA platform can be used with virtually no impact to simulation speed and memory requirements. As mentioned earlier, such simulations can even include optimizations that alter both artwork and circuit elements. To illustrate the credibility of this method, a schematic was created to validate the EM-based model for this impedance tuner. Figure 4 shows the schematic diagram for the impedance tuner, which uses a swept S-parameter simulation that accesses the measured data for all 64 states and also sweeps the model over those same states. Figure 5 shows the results for one of the states, demonstrating good agreement between the simulated results and the measured data.
The methodology presented here holds great promise as a predictive and efficient approach for the design, analysis, and verification of MMIC devices that contain passive structures of any shape. Using parameters to activate and deactivate the EM analysis of structures in the MEMS switches enabled parameterized, batch EM simulation for the example monolithic impedance tuner. Parameterizing some or all of the remaining microstrip design would generate further experiments.
ACKNOWLEDGMENTS
The author would like to thank Guizhen Zheng, and her research advisor, Dr. John Papapolymerou, for their work on the impedance tuner example used in this article.1
REFERENCE
