In microwave as well as more general areas of engineering, integration holds the key to meeting the simultaneous demands of smaller size, higher performance, and time to market. For semiconductor manufacturers, this means a continuous progression to smaller circuits. To support high-frequency applications, electronics manufacturers also must rely on a variety of process technologies and approaches. Beyond the chip itself, a plethora of process technologies exist for amplifiers and other components. Although technologies like CMOS and gallium arsenide (GaAs) continue to be viable options, process engineers are continuously developing solutions based on technologies like gallium nitride (GaN), indium phosphide (InP), and proprietary device- and circuit-level approaches.

The leading edge of chip development tends to be forged by Intel, which is why this firm's chip strategy is so closely watched. At the International Electron Devices Meeting (IEDM) this past December, Intel announced that it had completed the development phase of its next-generation manufacturing, which shrinks chip feature sizes to 32 nm and less. The Intel 32-nm-process paper describes a logic technology that incorporates second-generation, high-dielectric-constant (k)/metal-gate technology, 193-nm immersion lithography for critical patterning layers, enhanced transistor strain techniques, and nine levels of low-k-interconnect dielectrics. The process enables the highest drive currents reported to date for 32-nm technology. NMOS saturated drive current is 1.55 mA/m while the corresponding PMOS value is 1.21 mA/m.

The IEDM also saw the premiere example of wafer-scale integration of InP and RF complementary-metal-oxide-semiconductor (CMOS). Despite the exceptional speed of InP transistors, dense InP integrated circuits have not been created because InP technology is much more expensive, less advanced, and harder to work with than silicon. Recently, however, researchers from HRL Laboratories integrated entire wafers of 250-nm InP double-heterostructure bipolar transistors (DHBTs) featuring transition frequency (ft) and maximum frequency of oscillation (fmax) of 300 GHz with wafers of IBM's existing 130-nm RF-CMOS technology (commercially known as CMRF8SF).

Essentially, a partially fabricated, planar 200- or 300-mm IBM wafer is bonded to a full-thickness InP epitaxial wafer that can be either 76.2 or 100 mm in diameter. The InP wafer is temporarily bonded to a handle wafer, which allows the InP growth substrate and etch-stop layers to be removed. Next, an aluminum heat-spreader layer is deposited as a blanket film. The InP DHBT layers are then permanently bonded to the IBM CMOS wafer's top surface.

Recently, HRL also demonstrated graphene RF field-effect transistors (FETs) as part of the Carbon Electronics for RF Applications (CERA) program (Fig. 1). These FETs are made from epitaxially grown graphene materials with on-state current of 1180 A/m at a drain bias of 1 V. The transistor's RF performance, which was characterized using an HP8510 microwave vector network analyzer (VNA), yielded an extrinsic current gain cutoff frequency of 4 GHz with 2-m gate length. An fmax of 14 GHz was achieved at Vds = 5 V. The RF speed performance is expected to be improved as the FETs are scaled to below 100-nm gate length with reduced parasitic capacitance and resistance.

While graphene FETs have been demonstrated before, most used exfoliated graphene films. In contrast, HRL demonstrated graphene FETs using epitaxial film in the RF range. The advantages of this configuration are its high current-carrying capacity, superior thermal conductivity, and low-voltage operational potential. This milestone is the first in the proposed 51-month, three-phase program to develop a new generation of carbon-based RF ICs. The goal of the effort, sponsored by the Defense Advanced Research Projects Agency (DARPA) and under the management of the Space and Naval Warfare Systems Center (SPAWAR), is to leverage graphene carbon to create components that will enable unprecedented capabilities in high-bandwidth communications, imaging, and radar systems. HRL is collaborating with a group of universities, commercial companies, and the Naval Research Laboratory (NRL) on the program.

Military funding also is behind some GaN developments at RFMD. This past November, the firm signed a $1.4 million contract with the US Department of Defense (DoD) for the development of GaN technology and high-power RF solutions. The 12-month contract, which is an extension to previous contracts with the DoD, covers goals including reliability verification, passive-element development, and technology qualification of a manufacturable 48-V GaN RF power process for amplifiers and switches. The current program also supports the demonstration of wideband, high-power GaN MMIC amplifier and switch circuits targeting L-, S-, and C-band applications.

Although Toshiba America Electronic Components or TAEC has been a steady supplier of GaAs solutions, it also has committed to the ongoing development of GaN technology as a focus area for its high-power microwave transistor line. The company's roadmap includes additional power-added-efficiency GaAs amplifiers for satcom and microwave radios as well as a range of GaN devices for the C-, X-, Ku-, and Ka-bands. According to the company, GaN can enable higher levels of performance than GaAs, thanks to its superior material properties with higher electron velocity, higher breakdown voltage, and easier handling characteristics. The well-populated Toshiba GaN roadmap through 2010 includes devices for the C-, X-, Ku-, and Ka-bands with maximum output power of 150+ W in a C-band device. For communications applications, 4-W and 8-W C-band GaN HEMTs for wideband were planned for last year and this year followed by satcom devices including a 100+-W C-band device this year and a 150+-W C-band device in 2010.

Cree just began sampling two 120-W GaN HEMT microwave transistors for telecommunications applications like wideband code division multiple access (WCDMA), Long Term Evolution (LTE), and WiMAX. The transistors, which consist of single, input-pre-matched GaN HEMT devices, are built on high-thermal-conductivity silicon-carbide (SiC) substrates. The CGH21120F is designed to be used primarily in the 1800-to-2300-MHz frequency range while the CGH25120F is optimized for the 2300-to-2700- MHz range. When operated at 28 V, for example, the CGH21120F provides more than 110 W of peak continuous-wave (CW) power at 70 percent efficiency with gain of 16 dB. Under WCDMA 3GPP stimulus, the transistor provides 25 W average power with 40-percent efficiency in Class AB operation.

For ultra-wideband (UWB) ICs, Staccato Communications has chosen an all-CMOS approach. The most recent iteration of the Ripcord2 family is the SC4503 PCI Express wireless host controller interface for wireless Universal Serial Bus (USB) host applications. The single-chip solution integrates a WiMedia media access controller (MAC) and physical layer (PHY) together with a PCI Express interface in 65-nm CMOS technology.

Fujitsu Microelectronics America, Inc. also is focusing on 65-nm RF CMOS, as it just announced 65-nm manufacturing services. At the same time, the firm unveiled process design kits (PDKs) that are well suited for the development of systems-on-a-chip (SoCs) that integrate RF functions for Bluetooth, GPS, cellular, wireless audio/video, wireless LAN, and optical communications. Based on the Fujitsu 90- and 65-nm analog/RF CMOS process technologies, the PDKs include a comprehensive set of parameterized cells and toolkits for active and passive devices. The flexible inductor synthesis toolkit automatically generates precise and scalable inductor layout and models for high-speed analog and RF circuits.

On the handset end, Skyworks, Inc. is taking an indium- gallium-phosphide (InGaP) route to LTE. The company debuted a multiband, multimode frequency-division-duplexing (FDD)/time-division-duplexing (TDD) power amplifier this past December. By leveraging the company's InGaP bipolar field-effect transistor (BiFET) design and Green packaging solutions, the SKY77441 supports low operating voltage down to 3 V. This fully matched, 16-pin surface-mount module was developed for LTE FDD (Band 7) and TDD (Bands 38 and 40) applications. It also covers the 2.3-to-2.7-GHz range. The SKY77441 delivers over +26 dBm of linear power output with full LTE resource-block allocation under either quadrature phase-shift keying (QPSK) or 16-state quadrature amplitude modulation (16QAM) and over +28 dBm of linear output power under WCDMA modulation.

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Although power consumption is usually discussed as a problem in mobile handsets, it also has become an issue in cellular transmitters. To address this issue while lowering cost, Freescale just debuted its eighth-generation, high-voltage (HV8) laterally diffused metal-oxide-semiconductor (LDMOS) RF power transistors at Mobile World Congress in Barcelona, Spain (Fig. 2). The new portfolio of devices based on HV8 technology is optimized for operation in advanced power-amplifier architectures, which include Doherty configurations used in combination with digital predistortion for improved linearity. Initial product offerings will encompass power levels ranging from 100 to 300 W. HV8 products will cover all major frequency bands ranging from 700 MHz to 2.7 GHz. As an example of HV8 performance, a symmetrical Doherty amplifier reference design using two MRF8S9260H/HS transistors, which were designed for multicarrier GSM applications, was shown to deliver +58.0 dBm (630 W) peak power, 16.3 dB gain, and a drain efficiency of 42.5 percent at an average output power level of +49.4 dBm (87 W) with good broadband linearity.

At the component level, engineering companies also rely on process technologies like low-temperature co-fired ceramic (LTCC), microelectromechanical systems (MEMS), and more. Mini-Circuits has leveraged LTCC for a range of components, such as RF transformers and mixers. The firm's LTCC coupler family, for example, covers 5 to 4200 MHz. These 50- and 75-O directional and bi-directional couplers flaunt coupling ranging from 6 to 22 dB in package sizes as small as 0.12 x 0.06 in. LTCC expertise also can be found at Barry Industries, which offers an LTCC multilayer foundry, design, and production facility for products to 65 GHz.

Many companies have come up with specialized proprietary process technologies that have given them their own market niche. Vectron, for example, uses the latest techniques in both bulk-acoustic-wave (BAW) and surface-acoustic-wave (SAW)-based designs for its timing products (see "Vectron's Vision Of Frequency Control," December 2008). Hailing from Merrimac Industries, Multi-Mix Microtechnology is a process based on fluoropolymer composite substrates. Using a fusion bonding process, those substrates are bonded together into a multilayer structure. The fusion process provides a homogeneous dielectric medium for superior electrical performance at microwave frequencies. The bonded multilayerswith embedded semiconductor devices, MMICs, etched resistors, circuit patterns, and plated-through via holesform a surface-mount module that requires no further packaging.

The latest offshoot of Peregrine Semiconductor Corp.'s silicon-on-sapphire UltraCMOS process technology is the DuNE design methodology (Fig. 3). DuNE has made possible a single-die tunable capacitor circuit dubbed the Digitally Tunable Capacitor (DTC), which enables antenna tuning in cellular and mobile applications. According to the company, MEMS and ferroelectric materials technologies like BST have been used to implement tunable antennas and filters. However, they are not yet proven for high-volume production. In addition, those technologies typically require a bias voltage to 30 V or higher to tune. Because UltraCMOS technology enables the monolithic integration of RF, analog, and digital circuitry, the single-die DuNE DTCs integrate high-quality-factor (high-Q) tunable capacitors (Q = 40 to 80 at 1 to 2 GHz) with a built-in serial interface. Typical capacitance values range from 0.5 to 10 pF with typical tuning ratios ranging from 3:1 to 6:1 with 5-b or 32 states of resolution. In addition to more than +38 dBm of power handling at 50 O, DuNE DTCs feature a third-order-intercept point of more than +65 dBm and switching speed of 5 s or less.

HVVi Semiconductors, Inc. made its debut with the High Voltage Vertical Field Effect Transistor (HVVFET) architecture. This architecture allows designers to eliminate amplification stages in power amplifiers, reduce parts count, and shrink printed-circuit-board (PCB) space requirements. For example, designers building a 1-kW PA can use the HVV1012-060 to drive multiple HVV1012-250 devices and replace three-stage amplifiers using comparable LDMOS or bipolar components. Designed for L-band avionics applications operating between 1025 to 1150 MHz, the HVV1012-060 is designed for 48-V operation and provides over 60 W of pulsed output power. The device delivers 23 dB of gain with a pulse width of 10 s and pulse duty cycle of 1 percent at drain voltage and quiescent drain current of VDD = 48 V and IDQ = 25 mA, respectively. The HVV1012-060 is specified to withstand a 20:1 VSWR over all phase angles at the rated output power and operating voltage across the entire frequency band.

These examples give only a small glimpse into the myriad of technologies being used to get the most performance and integration out of the smallest circuits. Research laboratories around the globe are hosting efforts to use or combine process technologies in novel ways. In addition, many microwave companies are developing their own approaches when existing technologies do not deliver the required performance. The march to fourth-generation (4G) cellular services and the continuous evolution of satcom, radar, and defense applications will continue. To enable their evolution, process technologies will have to keep reaching beyond today's performance limits.