Designers of low-noise oscillators and phase-locked loops (PLLs) may find a visit to Hittite Microwave's site at www.hittite.com/ worth their time. The site features a useful PLL Calculator that can quickly model the phase-noise behavior of a frequency synthesizer. Admittedly, the calculator is based on Hittite's PLL components (offered by means of pull-down menus), such as phase/frequency detectors, dividers, and voltage-controlled oscillators (VCOs). Still, an operator can choose the "custom" option when selecting components and enter their own key operating parameters, such as frequency and output power, before performing a phase-noise calculation. Hittite ==> http://lists.planetee.com/cgi-bin3/DM/y/eA0CWyaL0Gth0BAuM0AG

Once parameters for the key PLL elements have been entered, an operator clicks on the "next" button to view results for both the reference-oscillator and VCO phase noise. Depending upon these results, a user can then move to the final "Calculate" button to see a plot of the final PLL synthesizer phase noise. The phase noises of the separate elements are also shown on this screen, showing how each element contributes to the overall noise of the PLL. For more on the PLL calculator, click on the menu button on the left-hand side of the home page at www.hittite.com/.

Verification Of Nanometer-Scale Design Compressed By Up To 50% Cadence Design Systems, Inc. recently announced the Cadence Incisive verification platform, the first single-kernel verification platform for nanometer-scale designs that supports a unified verification methodology for the embedded software, control, data path, and analog/mixed-signal/RF design domains. The new platform's unified methodology helps slash testbench development time, verification runtime and debug time, and can compress overall verification time by up to 50 percent. This enables a dramatic improvement in time-to-market for semiconductor customers, and accelerated system design-in of complex ICs for design chain partners.

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