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There is no point in attempting to breadboard the final design, since the difficulties due to stray inductance and capacitance seem insurmountable. Instead, a careful layout is made as shown in Fig. 3. Several aspects of this layout should be noted: A ground terminal appears at almost the entire periphery of the substrate in three isolated areas. These areas are later connected when the substrate is placed in the test package. The signal flow is approximately linear from left to right to minimize the coupling effects. Conductor pads are generally kept wide to avoid stray inductance. The number of bonded wires and their length are kept small for the same reason. The inductance due to the leads from the center of the inductors adds to the thin-film inductance. These leads can be bonded to any point on the inductors thus affording a range of center frequencies, selectable during fabrication. The area of each capacitor is predominantly determined by the bottom place, since dimensional control of this film is easier than for the top layer.

All layers are vacuum evaporated on a glass substrate with a dielectric constant of four. The bottom conductor layer is gold, 2200 Å thick, with a specific resistance of 0.1 ohm per square. The resistive layer is chromium, 300 Å thick with a specific resistance of 200 ohms per square and a TCR of ± 110 ppm. The third layer is silicon monoxide, 12,000 Å thick, with a specific capacitance of 0.030 pF per square mil. This serves both as the capacitor dielectric and as resistor protection. The last layer is aluminum, 2000 Å thick, with a specific resistance of 0.1 ohm per square. Twelve substrates are fabricated on one plate and then diced (One of the diced substrates is shown in Fig. 4 and measures 0.410 x 0.205 x 0.020 in.). Both ac and dc tests are then performed.

Two transistor chips with associated leads are thermo-compression bonded to the substrate. The substrate is placed in the previously machined brass package, and the ground areas are bead soldered to the package. OSSM connectors (type 262) are screwed into the package and the power connector (Cannon Microstrip) is inserted. The two center conductors of the rf connectors, and the three power leads, are then micro-soldered in. The OSSM connectors must previously have been modified by shortening the center conductors and filing them flat. The positioning is such that this conductor lays on the correct pad area of the substrate. The lid is now attached, and the completed amplifier can be tested. A complete amplifier without lid is shown in Fig. 5.

Amplifier performance

The amplifier test circuit is shown in Fig. 6. OSSM-to-N adaptors are used at the amplifier terminals. All impedances are 50 ohms.

A number of amplifiers have been made at different frequencies, by bonding to different points on the inductors. The lowest center frequency attainable was 650 Mc. A typical response for an amplifier with a center frequency of 987 Mc, a 40-Mc bandwidth, and 10-dB gain, is shown in Fig. 7. There was no saturation with 1 mW rf input at 120 mW power dissipation. The observed results were so close to the design figures that the use of y parameters for the packaged transistors seems justified.

In system use, the amplifier would not be packaged by itself. Thus, the volume occupied by the amplifier substrate, with attached chips would be only 0.0008 in.3.

Conclusion

The lumped-constant microelectronic approach appears attractive at the lower microwave frequencies. Its advantages, compared to microstrip circuitry, are that of small size and the use of familiar design at lower frequencies. Although circuits cannot be breadboarded in conventional fashion, the Linvill design technique, in combination with precise substrate fabrication, yields operating parameters quite close to the design values. The present difficulty in obtaining ac parameters for uncased transistor chips does not appear serious and, in any case, it will probably be possible to obtain this information in the near future.

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