**Trade-offs**

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From the curves it is assumed that a transistor with a high dc beta (and thus a high h_{FE}) is relatively easy to match since it has a high input resistance and a low input inductance. But, matching is a significant problem because high-power, hf transistors have a large-signal real input impedance in the order of 0.2-0.7 ohm for a 20-50-W device. The trade-offs involved with high dc beta are:

- A high-beta transistor has greater tendency to oscillate and at lower frequencies.
- It is more difficult to maintain a constant bandwidth as a function of a circuit layout.
- It will have lower saturated-power output, although it will have higher power gain at most frequencies.
- It will be a less linear device and thus will have higher intermodulation distortion and less dc bias stability for single-sideband circuits.

**Input-impedance to collector-current relationships**

*Fig. 8.** **Series base resistance vs input current. Note that lower dc-beta transistors have less variation in input resistance with current.*

The input impedance should have less variation with collector current (or emitter current) if the device has a low dc beta. In Fig. 8 the series base resistance, r_{b}, (or real part of h_{11e}) has less variation with current for a low h_{FE} transistor. A definite similarity of the impedance-vs-current curve to the h_{fe}-vs-current curve exists. The same rapid change in resistance is observed in the same current region, as for dc beta and for h_{fe}. It is also apparent from these curves that the large-signal impedance will be much lower than the small-signal value. This impedance in a tuned circuit is also affected by the stored charge and how the charge is drawn out of the device in the “off” part of the drive cycle. This would have the effect of lowering the input impedance still further. These curves show that the harder a transistor is driven (such that the average and peak currents become higher), the lower the input resistance. Large-signal impedance measurements show this to be true.

The series inductance, L_{s}, would also be expected to show variations with collector current, since the input capacitance changes with current. Typically, the input capacitance of a transistor increases as the collector current increases. The input capacitance would also be affected by the current pinch-off effect. Also, one would expect a more rapid input-capacitance change in the same areas where there are rapid changes in the input resistance, h_{FE}, and h_{fe}. Since capacitance increases with current level, the effective series inductance would be expected to increase likewise. This is because there will be less capacitive reactance to subtract from the package inductance. The theory is borne out in practice as shown in Fig. 9, where a larger change in input inductance occurs for a high-h_{FE} device than one of low h_{FE}. Both curves show a tendency to have rapid changes in series inductance above 1.1 A where this correlates with the same rapid changes in other parameters and in h_{FE} itself. Inductance also increases with current. This corresponds with an increase in input capacitance with current. One must examine the combined effect of L_{s} and r_{b} to see how the input circuit Q and package bandwidth are affected by current and h_{FE}. Again, it should be noted that the large-signal input inductance will depend on the stored charge of the transistor and the class of operation. Thus, these curves can only give an indication of which way the values will go. Typically, the large-signal values of these curves will be somewhat different from the high-current values.

*Fig. 9.** Input inductive reactance vs collector current for low- and high-dc beta transistors. The low-beta transistor has less over-all reactance variation than the one with a high beta.*

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**Package Q and sensitivity to series lead inductance**

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Bandwidth capability of the transistor, and thus package Q, are an important consideration and not only for those applications where bandwidth is important. A low-Q input to a transistor (a low reactive part relative to the real part) is important for ease of matching to the transistor; it also improves circuit stability. The package input Q doesn’t determine the circuit bandwidth in itself. Other factors are the feedback effects of the load on the collector circuit and the degree of difficulty in matching to the low value of the input resistance. The higher the ratio of the source impedance to the real part of the transistor input impedance, the narrower the bandwidth; also, the more difficult it is to maintain the bandwidth when designing and cascading networks. A low package-input Q is of utmost importance as the first step in providing a good transistor for broadband applications and for ease in circuit design.

The circuit designer must connect the last element of the input matching network at some point external to the transistor package. This can’t be done without some finite package lead length and added inductance beyond what appears at the input to the package.

To maintain the low package Q, it is necessary to have a shunt capacitance to ground from the package input or from a point near it. Thus, it is quite important for good circuit design that the input-Q sensitivity to a change in the added series inductance external to the package be rather small. The small-signal bandwidth is:

The bandwidth sensitivity factor is defined as:

This sensitivity factor gives a relative measure of the bandwidth lost when a series inductance is added using the small-signal short-circuit impedance measurements as the criteria. It can only be a relative factor, because bandwidth is also significantly affected by changes in input impedance caused by the load on the collector.

*Fig. 10.** Bandwidth sensitivity vs dc beta. One would choose a high-beta transistor for a high-input impedance for ease in matching and for lowest input Q.*

Because the input impedance is a function of the transistor’s dc beta, it is possible to plot a range of values for the sensitivity factor S_{B} vs h_{FE}, using the measured values of the small-signal input parameters. This plot is shown in Fig. 10. Over the normal beta range for a given device type, the sensitivity factor can vary all the way from 15 Mc/nH to 90 Mc/nH at the high-beta end. There is a significant trade-off here. One would like to choose a high-beta device for a high-input impedance for ease of matching and for lowest input Q.

This creates a problem in that the bandwidth sensitivity is a maximum for a change in series inductance brought on by packaging or placement of components. A middle-of-the-road compromise is to choose a mid-range beta. More work will be required with actual broadband loads and large-signal input-impedance and bandwidth measurements to determine what the actual sensitivity factor is in a direct circuit operating mode. But the small-signal analysis indicates the direction of the tradeoffs. The small signal package Q is:

Package Q is dependent upon the h_{FE} of the device. A typical median-range plot (Fig. 11) of many device measurements shows the approximate variation in package Q with h_{FE}. Because of differences in resistor stabilization values, transistor resistivity, and uniformity of current and power distribution over the device, package Q can vary over quite a broad range either side of this median curve for a given h_{FE}.

*Fig. 11.** How package Q varies with dc beta. Factors that affect this curve are resistor stabilization values, transistor resistivity and uniformity of current and power distribution over the device.*

*Fig. 12.** Variation of package Q with collector current. Note rapid change in Q above the 1.1-A level.*

Package Q is also a function of the collector current as shown in Fig. 12, and one would expect it to change even more rapidly as other parameters change at the same time.

Not the sharp change in package Q above the 1.1-A level for a 3TE440 transistor.