Few conferences carry the clout of the IEEE's International Electron Devices Meeting (IEDM). For 51 years, it has been a launching pad for a wide range of semiconductor technologies, including gallium-arsenide (GaAs) transistors, silicon-germanium (SiGe) devices, and lately CMOS micro electromechanical systems (MEMS) components and assemblies. The 2006 edition of this respected semiconductor meeting is scheduled for December 11-13, 2006 at the Hilton San Francisco (San Francisco, CA).

The IEEE IEDM can be considered an official log of semiconductor benchmarks. It is common ground for a wide range of different types of semiconductors, from nanostructure MEMS developments to massive high-power microwave transistors for radar applications. While those interested in advances in process technologies, sensors, memory devices, and computer processors will find them at the 2006 IEEE IEDM, the focus of this report is on RF/microwave-related developments in semiconductor technologies.

Several "breakthrough" type developments will be announced at this year's conference, including wireFET technology-for three-dimensional (3D) integrated circuits. The technique, as reported by Vidra Varadarajan and fellow researches from the Department of Electrical Engineering and Computer Sciences at the University of California at Berkeley (Berkeley, CA) and the Advanced Device Development Division of NEC Corp. (Tokyo, Japan) amounts to fabricating a transistor directly within a wire or interconnect. The process flow consists of forming an aluminum (Al) wire, forming a silicon (Si) island on top of it, and annealing the metal transistor structure below the Al-Si eutectic temperature (+570°C) to cause a layer exchange between the Si and Al. This results in a polycrystalline-Si (poly-Si) region embedded within the wire, which can serve as the channel of a transistor. By applying a bias to the Si substrate, which is electrically isolated from the Al wire by a silicon-dioxide (SiO2) passivation layer, the resistance of the wire can be modulated. Because the researchers' process is fairly simple and has a low thermal budget, it is thought that their novel wireFET technology could be applied to the implementation of configurable interconnections as well as tunable passive devices in cost-effective 3D ICs.

One relatively new device structure that has the potential to replace bulk MOSFETs because of its superior control of short-channel effects is the Fin-FET. But in order to better understand the novel device, models must be developed in support of computer-aided-engineering (CAE) circuit-simulation tools. G.D.J. Smit and associates from Philips Research Laboratories ( Eindhoven, The Netherlands), IMEC ( Leuven, Belgium), and Arizona State University (Tempe, AZ) offered the results of their work on creating a compact FinFET model for a symmetric three-terminal device with thinly doped or lightly doped body. The accuracy of the model was validated by comparison with measurements on FinFETs wth 30-nm-thick undoped silicon body which was isolated from the substrate by a buried oxide, a metal gate, and SiON gate dielectric. The height of the device's fins was 60 nm, the physical gate length was 110 nm, and a total of 300 fins were fabricated in parallel. Both DC and scattering (S) parameter measurements were performed through 50 GHz. After fitting the model to the DC data, it was apparent that it accurately predicted not only drain current but transconductance as well.

In the area of modeling, T. Esaki and fellow researchers at the Graduate School of Advanced Sciences of Matter at Hiroshima University ( Hiroshima, Japan) presented details on a physics-based photodiode (PD) model with transient current generation explicitly contained in the end results. The model is compatible with conventional compact electrical device models and is ideal for simulation of optoelectric ICs (OEICs). The model includes the optically excited photocurrent and the PD device part solved in the time domain. Predictions from the model were compared with measurements for a single OEIC with a PD and a single MOSFET. The prediction results of the Gaussian distributed electric field exactly capture the laser excitation features shown by the measurements.

One of the more novel developments to be presented at IEDM is a large-area flexible wireless power transmission sheet using printed plastic MEMS switches and organic field-effect transistors (FETs). The research, conducted by Tsuyoshi Sekitani and associates from the Quantum-Phase Electronics Center of the School of Engineering at the University of Tokyo (Tokyo, Japan) and The Center for Collaborative Research at the University of Tokyo, shows the results of a power transmission sheet manufactured using printing process technologies. The position of electronic devices on the sheet (Fig. 1) can be contactlessly sensed by electromagnetic (EM) coupling using the organic transistors. Power is selectively fed to the objects by an EL field using the plastic MEMS switching matrix.

Inspired by unwanted dependence on batteries in wireless systems, the researchers sought a wireless power source. Their solution represents the first step towards building infrastructure for the many electronic devices that are scattered over desks, floors, walls, and ceilings and require power. By using wireless transmission of power to these devices, their batteries can be recharged, or they can even operate directly from the wireless power source.

The wireless power transmission sheet is manufactured on a plastic film. The sheet contains a two-dimensional array of 8 x 8 cells comprising position-sensing and power transmission units. The effective power transmission area is 21 x 21 cm. Once the position of an electronic object on the sheet has been contactlessly sensed by EM coupling using an organic transistor matrix, power is selectively fed to the object by an EM field using a two-dimensional array of copper coils that are driven by a printed plastic MEMS switching matrix. In their experiments with the sheet, 29.3 W of power was wirelessly received with power transmission efficiency of 62.3 percent. The sheet was only 1 mm thick and weighed only 50 g.

The MEMS switching matrix was formed with a combination of ink-jet printing and screen printing. The electrodes for power transmission and for electrostatic attraction are patterned on a 25-micron-thick polyimide membrane. Wireless power transmission was performed at 13.56 MHz with on/off ratio for the MEMS switches of better than 700. The change in the resistance of the MEMS switches after 300,000 switching cycles was less than 5 percent. Among the examples the researchers cited, they used their flexible wireless power transmission sheet to drive 21 light-emitting-diode (LED) lights requiring a total power of 2 W on a Christmas tree.

The use of plastic for electronic devices was also presented by student researchers Brian Mattis and Vivek Subramanian of the Department of Electrical Engineering and Computer Sciences at the University of California at Berkeley in their work on stacked low-power field-programmable antifuse memories for radio-frequency-identification (RFID) devices on plastic. The researchers demonstrated two stacked layers with 100 b/level (a total of 200 b) with programmable energy requirements of a mere 1 nW/b for encoding in low-cost RFID tags. The two layers of the antifuse array used shared electrodes with steering diodes facing in opposite directions. Due to the roughless of the plastic, a smoothing layer of PVP is applied. A 150-nm aluminum electrode is deposited through a shadow mask to form the bottom electrode lines. The antifuse layer is PVP spin-annealed at a relatively low processing temperature of +100°C. The devices allowed programming with 16-V pulses of 25 ns in duration for extremely fast write processes even at that low programmable power of 1 nW/b.

For extremely high-frequency results, few could match the work conducted by William Snodgress and team from the Department of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign (Urbana, IL). They reported record numbers for pseudomorphic InP/InGaAs heterojunction bipolar transistors with cutoff frequencies to 765 GHz at room temperature (+25°C) and increasing to 845 GHz (Fig. 2) at 55°C with a supply voltage of 1.65 V. The current density at room temperature was 18.7 mA/µm2 with the same results obtained at the lower ambient temperature. The researchers attributed the improved performance at lower temperatures to reduced transistor base and collector transit delays as well as smaller collector charging delays.

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In terms of raw RF/microwave power, Y.-F. Wu and co-workers from Cree Santa Barbara Technology Center ( Goleta, CA) announced an internally matched GaN high-electron-mobility-transistor (HEMT) amplifier capable of 550-W peak power at 3.5 GHz. Based on two 28.8-mm-periphery GaN HEMTs with all impedance-matching components and circuitry within the package, it features a power bandwidth of 3.3 to 3.6 GHz.

Each HEMT device consisted of an AlGaN layer, a thin AlN interlayer, and GaN buffer with Fe doping, all grown on a silicon-carbide (SiC) substrate. The device has double field plates with the first as an integral part of the gate and the second connected to the source or ground. Through viaholes were employed under the source ohmic contacts for minimum grounding inductance and elimination of air bridges. The amplifier was housed in a ceramic package. At the input, two parallel LCL networks comprising wire bonds and planar capacitors transform each of the low and capacitive gate impedances to higher resistive values. These feed lower impedance lines followed by a 2-to-1 combiners to realize the 50-ohm feed. At the output, wire bonds, low-to-high impedance lines and a combiner were used to achieve power impedance matching to the 50-ohm lead. The amplifier was designed for a center frequency of 3.5 GHz. It was tested under Class C conditions with the gate pinched off at 3.8 VDC. The input signal was modulated with 2-microsecond pulses at a 100-microsecond interval (2-percent duty cycle). At a drain bias of +48 VDC, the output power varied only 1.2 dB from 3.3 to 3.6 GHz with average power of 451 W. The power plateau of 490 W ranged from 3.35 to 3.40 GHz with associated gain of 12.4 to 12.5 dB. The drain efficiency ranged from 53.2 percent to 71.2 percent, with an average value of 65 percent.

When the drain bias was increased to +55 VDC, the amplifier's output power increased to an average level of 523 W with flatness improving to 1 dB from 3.3 to 3.6 GHz (Fig. 3). The average drain efficiency was 62.6 percent. Peak power was 550 W at 3.4 GHz with 66 percent drain efficiency and 12.5 dB associated gain. A power-efficiency combination of 521 W and 72.4 percent were obtained at 3.55 GHz. This two-transistor amplifier certainly is evidence of the great potential of GaN device technology in terms of solid-state power.

For a good showing in monolithic RF/microwave power, J.-S. Moon and associates from HRL Laboratories ( Malibu, CA) revealed results on AlGaN/GaN HEMT MMIC amplifiers with as much as 20 W output power at X-band. These amplifiers employ 1-mm-gate-periphery devices fabricated with a 0.15-micron gate-length process and operated under Class AB or Class B/C bias conditions. Small-signal measurements showed transition frequencies ranging from 42 to 60 GHz, depending upon the field-plating thickness used, with maximum oscillation frequency approaching 100 GHz. At 10 GHz, single devices yielded 7.5 W CW output power at a drain-source voltage of +35 VDC. At 3.1 W CW output power, the power-added efficiency (PAE) is 67 percent and the drain efficiency is 77 percent. Two-stage MMIC amplifiers were evaluated on wafer at 10 GHz in both CW and pulsed mode using water to cool the devices. With a small signal gain of 20 dBm the MMIC amplifiers delivered pulsed output power of better than 19 W with 43 percent PAE and 47 percent drain efficiency.

From the same location (HRL Laboratories), the research team of M. Micovic reported work on a GaN heterojunction-field-effect-transistor (HFET) power MMIC designed for W-band applications from 75 to 110 GHz. The MMIC is based on an HFET device with extrinsic transition frequency of 90 GHz and maximum frequency of oscillation of 200 GHz. Using GaN devices on SiC substrates, a three-stage MMIC amplifier was designed with GaN devices measuring 4 37.5 microns. The amplifier exhibited small-signal gain of better than 17 dB from 79 to 88 GHz. At 80.5 GHz and measured at a drain bias of 20 V, the three-stage amplifier yielded saturated output power of +25 dBm at 2-dB compression. The PAE was 14 percent and the drain efficiency for the third (output) stage was 26 percent. Because of the frequencies involved, the peak PAE and saturated output power were limited by the available input drive power.

Jorg Scholvin and the research team at Massachusetts Institute of Technology (MIT, Cambridge, MA) reported on their investigations into the fundamental power and frequency limits when scaling down CMOS devices for RF applications. Comparing performance when scaling quarter-micron CMOS devices to 65-nm devices, both fabricated with a 65-nm CMOS process, the researchers examined power densities and frequency limits for devices with various widths. Running at 1 V, the 65-nm devices delivered power levels to about 80 mW for wider devices and less for narrower devices at lower power densities. The quarter-micron devices provided output power to 450 mW when running at 2.5 V, although the wider devices became limited in frequency. The researchers learned that the upper frequency limit for power devices did not scale, with the frequency limit for 65-nm power CMOS devices estimated to be about 20 to 25 GHz.

F. van Rijs and S.J.C.H. Theeuwen of Philips Semiconductors (Nijmegan, The Netherlands) studied ways to improve the efficiency of silicon laterally diffused metal-oxide-semiconductor (LDMOS) transistors for cellular base stations. Because newer cellular systems, such as those based on sideband (WCDMA) techniques require excellent linearity, transistor amplifiers are usually backed off from their specified rated power levels in order to improve linearity This practice, however, results in degraded efficiency. Thus, the researchers sought ways to improve the efficiency of these devices while also improving the linearity. Put simply, by controlling device losses through careful design and choice of topologies, the engineers were able to create devices year after year with improvements in power density and power gain accompanying the improvements in efficiency. By performing large signal analysis at various frequencies for a number of different devices, it was possible to control frequency-dependent losses resulting from the resistive part of the output capacitance.

E.L. Piner and co-workers from Nitronex Corp. (Raleigh, NC), a firm synonymous with commercial power GaN transistors, reviewed the various mechanisms that can degrade performance in GaN HFETs. The research team has been involved in reliability studies on the firm's model NPT35010 transistor with 10 W output power from 3.3 to 3.8 GHz and ideal for WiMAX applications. By reducing the gate length to one-half micron, the gain and cutoff frequency were increased, and implementing a source field plate, the researchers were able to achieve an additional increase in gain and efficiency. One of the key degradation mechanisms is device leakage. By modifying the device materials and processes, device leakage can be controlled and even reduced for enhanced performance and reliability.

For more information on the IEDM conference, contact Phyllis Mahoney, IEDM, 16220 South Frederick Ave., Suite 312, Gaithersburg, MD 20877-4020; (301) 527-0900 ext. 103, FAX: (301) 527-0994, e-mail: iedm@his.com, Internet: www.his.com.