Gallium arsenide (GaAs) is a well-established device technology now at the heart of many commercial and military systems. The technology is now more than 40 years old, with early diffused-gate transistors with lower-Megahertz gains reported over four decades earlier.1 Those earlier research efforts resulted in a significant leap forward in 1971 when GaAs transistors with 1-m gate lengths (Fig. 1) were fabricated, having maximum frequency of oscillation (fMAX) to 50 GHz and useful gain to 18 GHz.2

GaAs is an excellent material for fabricating field-effect transistors (FETs) and Schottky diodes since it can be a low-loss dielectric material (with a dielectric constant of approximately 10.9). In its semi-insulating form, it has become the basic material for RF and microwave integrated circuits in which active and passive elements are combined on the same chip. The passive elements take the form of either transmission lines (usually microstrip) or lumped-element components. Lumped elements produce more circuit design flexibility provided that the equivalent circuits of these components can be modeled accurately. Much of the early work at Plessey in the late 1960s and early 1970s (both hybrid and monolithic) used lumped components from L-band through J-band to produce both passive and active circuits.3

Much of that early lumpedelement development at Plessey was inspired by research being done at the famed RCA Laboratories (Princeton, NJ).4 Prior to GaAs, a number of materials served as substrates for miniature lumpedelement circuits, including polished alumina, quartz, and sapphire. Figure 2 shows typical structures and equivalent circuits for single-loop and spiral inductors as well as interdigital and overlay capacitors. Before sophisticated electromagnetic (EM) computer- aided-engineering (CAE) software was available for analysis, lumped elements were typically characterized by means of equivalent circuits. The one- and two-port scattering parameters (S-parameters) of the lumped elements were measured, computer corrected, and extracted to subtract parasitic reactances from the model in progress.

For example, single-loop inductors were found to be most suitable for inductance values of less than 2 nH at frequencies above 6 GHz. Loop inductors were measured with quality factor (Q) values of over 60 at 10 GHz. Figure 3 shows the variation in Q with metallization thickness and track width for a 1-nH inductor at 10 GHz. The Q drops rapidly below 1 m due to skin depth effects.

Both thin- and thick-film lumpedelement components were developed and both active and passive circuits developed such as low-noise amplifiers (LNAs), filters, and couplers. Novel circuits were built using polished alumina, discrete transistors, diodes, and lumped elements. Alumina materials were relatively low in cost during those pioneering days, and available in relatively large substrate sizes. Use of the material enabled "fast-turn" designs on a substrate material with dielectric constant relatively close to that of GaAs Figs. 4(a) and 4(b)>.

During that same time period, Plessey Research (Towcester, Caswell, England) was developing the first GaAs metal-epitaxial-semiconductor FETs (MESFETs), so that lumped-element characterization was extended to GaAs substrates. Figure 5(a) shows an early example of a rectangular spiral inductor using an underpassed connection to the center of the spiral, with the available inductance plotted in Fig. 5(b). The connection is deposited onto the GaAs surface and a thin layer of polyimide applied as an insulator prior to deposition of the spiral metal layer on top.

Early GaAs monolithic- microwaveintegrated- circuit (MMIC) designs were fabricated on irregularly shaped 1-in. substrate wafers prior to the availability of 2-in.-diameter GaAs wafers. Figure 6 shows the processing sequence used by Plessey to fabricate GaAs MMICs either on ion-implanted GaAs or vapor-phase-epitaxial (VPE) GaAs material. The sequence shown here relates specifically to the use of implanted material. Active channel regions and FET Ohmic contacts were formed by a dual dose and energy implantation schedule to produce devices with low drain-to-source resistance. Active areas were defined by either a selective implant or mesa process. Source-drain contacts were then defined and contacts alloyed to produce acceptable low specific contact resistances. FET channels were etched to produce the required saturated drain current while gates were formed using Ti-Al. A first-layer metallization was then defined using a lift-off process; this same process was also used to form the bottom electrodes of overlay capacitors. The silicon nitride for these capacitors was deposited using a plasma-enhanced deposition technique and with selective material removal by means of plasma etching.

At this point, a polyimide material was spun on the wafers and cured to produce a very uniform, low-loss dielectric that was used in several ways: as inter-metal layer isolation, a dielectric layer for low-value overlay capacitors, as a "stress-relief" barrier between the GaAs and other layers (such as resistive films), and finally as an ion-milling barrier. Following polyimide deposition, windows were opened in the polyimide, followed by interconnect metallization that also formed the top electrodes of overlay capacitors. Thin-film resistors were deposited on the top of the polyimide and interconnected to the metallization. Where low-capacitance interconnects were required, for example, from the center of a spiral inductor, 3-m-thick "air-bridge" technology was developed to form those three-dimensional connections. Early MMICs did not employ viaholes through the GaAs substrate. Early work on Xband and J-band MMIC LNAs at Plessey used simple lumped elements (such as single-loop inductors and interdigitated capacitors) to provide matching networks. This was because only single-level metallization was available and silicon nitride (dioxide) overlay capacitors had not been developed.

The first singlestage LNAs, covering 8 to 12 GHz, were designed in 1974 at Plessey Roke Manor. Figure 7(a) shows hand-drawn MMIC artwork (from March 1974) prior to being transferred to a hand-cut rubylith; a single-stage MMIC amplifier similar to that represented by the artwork is shown in Fig. 7(b). After successful development projects using lumpedelement impedance matching to cover broadband X-band and J-band LNAs,5 MMIC developments concentrated on S-band designs for radar applications. In particular, developments of a MMIC chip set for the naval Multifunction Electronically Scanned Adaptive Radar (MESAR) phased-array system started as a joint program between Plessey Central Research Laboratories (Caswell) and Roke Manor Research Limited. MESAR was seen as an ideal vehicle to demonstrate S-band MMICs.

A number of MMICs were developed in the late 1970s and early 1980s as proof of concept for various circuit functions as well as for fully integrated, multifunction modules. Of significant importance during this period was the rapid advance of CAE software that made the design and analysis of complex circuits possible.6 Four of the RF functions for transmit/receive (T/R) modules merit review here: for T/R switching, low-noise amplification, power amplification, and phase-shifting functions.

Figure 8 shows an example of a single- pole, double-throw (SPDT) switch where GaAs FETs are operated as voltage-controlled resistors with zero drain-to-source voltage. The gate operates as an "isolated" switch control and, in contrast to a PIN diode, the FET requires no drive current. This T/R switch featured insertion loss of 0.5 dB, with 20 dB isolation and 2 W power-handling capability.

Various different circuit approaches were used for producing LNAs, using both passive and active impedance- matching approaches.7,8Figure 9 shows an example of a two-stage LNA IC with noise figure of 5 dB and gain of 12 dB from 3 to 6 GHz. The input and output VSWRs were better than 1.80:1 and 1.30:1, respectively. The amplifiers employed 1-m gate-length FETs with gate widths of 600 m. Figure 10 shows an actively matched LNA employing a common-gate input stage, a common-source second stage, and a source-follower active splitter output stage. This MMIC covered 2 to 4 GHz with 19-dB gain, 3-dB noise figure, and low sensitivity to component value changes of the order of 20 percent from their mean values.

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Early MMIC power amplifiers developed at Plessey used feedback techniques to produce large percentage bandwidths in the 2-to-4- GHz frequency range.9 At these frequencies, conventional broadband matching circuits require rather large-value inductors that consume large areas of GaAs as well as having low Q. In order to reduce the number and magnitude of matching components, the high transconductance of the power FET can be exploited by feedback.

As an example of these design approaches, Fig. 11 shows a single-stage chip amplifier capable of 10-dB power gain and +30-dBm (1-W) output power at 1-dB compression from 2.5 to 3.5 GHz. It used a GaAs FET with 2.4-mm gate width, silicon nitride capacitors for RF bypassing, DC blocking, impedance matching, and CrSiO cermet resistors. The single-stage GaAs amplifier measured 2.3 x 4.5 mm.

In those early GaAs pioneering days at Plessey, two types of phase shifters were investigated for radar applications : "analog" vector modulators and "digital" switched-line phase shifters.10,11 Unlike digital phase shifters that redirect a single signal through a number of alternative paths, an analog phase shifter takes a single signal, divides that signal into two equal amplitude vectors, shifts the vectors by a fixed phase with respect to each other, attenuates both vectors by predetermined amounts, and then recombines the vectors into a single resultant. Using GaAs technology, Plessey produced a complete MMIC-based S-band vector modulator (Fig. 12). The vector modulator was designed for relatively high insertion loss due to the need to fully attenuate one of the vectors under certain phase settings. This can be overcome by the use of an active signal splitter (such as the one shown in Fig. 10) prior to the phase difference networks.

Digital phase shifters were also developed at Plessey during the early days of GaAs. For example, a 4-b, switched-line phase shifter consisted of two ICs mounted in cascade. The ICs contained the matrix of FET switches used to switch one length of microstrip to another. These microstrip lines were contained on an alumina substrate used to carry the ICs and also provided control lines. Figure 13 shows the switching chip. Across all 16 phase states, the worst-case phase error from 2.7 to 3.3 GHz was 4 deg., representing a least-significant-bit (LSB) error of 0.25LSB or less.

Figure 14 shows a typical T/R module for phased-array radar applications. The first of these modules were completed and delivered just over 25 years ago (in 1983). The GaAs MMIC T/R circuit was housed in a low-weight hermetic package with an aluminum heat sink. Interconnections between the module, the antenna face, and the RF beam-forming network were made by means of three OSP push-on (blind-mate) connectors. Control data was supplied via a fiber-optic cable to reduce both the problems of data corruption from EM sources and also the weight associated with a conventional wiring loom. A complete module, shown in Fig. 15, measured 40 x 117.5 x 10 mm, excluding the heat sink. The microwave circuitry occupied an area of 18.5 cm2 at one end of the module while the remaining 28.5 cm2 contained the custom thick-film hybrid control circuit. The microwave circuits were printed on to 10-milthick alumina substrates.

The microwave circuit was composed of six subassemblies: a T/R switch, LNA, phase shifter, driver amplifier, power amplifier, and PIN diode limiter.12 The T/R switch contained a GaAs MMIC with on-chip gate feed resistors and capacitors. The chip measured 1.1 x 1.57 mm. The MESFETS were used in shunt across the quarter-wavelength transmission lines and a grounded stub was used to offset the stray capacitance. Insertion loss was less than 0.7 dB while isolation was 18 dB.

The LNA subassembly was made from two cascaded GaAs MMIC LNAs. These LNAs had an individual chip area of 5.0 mm2. The MMIC circuit was a two-stage design with feedback on the first stage in order to improve the input VSWR. It featured gain of 18 1.5 dB from 2.5 to 3.5 GHz with maximum noise figure of 2.1 dB. The MMIC represented a fairly complex design for the time; still; yields of better than 57 percent were achieved for the fabricated devices.

The 4-b phase shifter was a switched line design with the delay lines being realized on alumina.13 Phase shifting was accomplished by the use of two GaAs MMIC switching chips measuring 1.12 x 2.54 mm. Each chip contained 2-b phase switching by means of series FETs and a T/R routing switch. The insertion losses through the phase line and the bypass switch were equalized by tailoring the gate widths of the FETs. This resulted in amplitude imbalance between all 16 phase states of better than 1 dB. Phase shifting accuracy at the 2.7-GHz design frequency was 4 deg rms across all 16 phase states.

The driver amplifier was a conventional two-stage hybrid design using two GaAs power FETs. The amplifier had an overall gain of more than 22 dB from 2.5 to 3.5 GHz with output power of +28 dBm at 1-dB gain compression. The power amplifier was also a hybrid design using an 8-mm gate-width power FET. The circuit had gain of greater than 8 dB and output power of +34 dBm (2.5 W) at 1-dB compression. The PIN diode limiter subassembly was capable of limiting pulsed signals at peak power levels to 10 W. The thick-film control hybrid contained the DC voltage regulation for each of the microwave subassemblies together with a custom gate array and electronically erasable programmable read-only memory (EEPROM). The gate array interprets the data sent to the module via the external fiber optic control link. The gate array performed all the necessary T/R switch sequencing together with computation of the optimum phase shifter setting for a given beam direction and module location.

REFERENCES
1. J. A. Turner, "Gallium Arsenide," Institute of Physics Conference Series, Vol. 3, 1967.
2. J. Turner, A. Waller, R. Bennett, and D. Parker, "An electron beam fabricated GaAs microwave field effect transistor," GaAs and Related Compounds Symposium Digest, pp. 234-239, 1970.
3. R.S. Pengelly and D. C. Rickard, "Design, Measurement and Application of Lumped Elements up to J-Band," 7th European Microwave Conference, 1977, pp. 460-464.
4. M. Caulton, B. Hershenov, S. Knight, and R. DeBrecht, "Status of Lumped Elements in Microwave Integrated CircuitsPresent and Future," IEEE Transactions on Microwave Theory and Techniques, Vol. MTT-19, No. 7, July 1971, pp. 588-599.
5. R. S. Pengelly and J.A. Turner, "Monolithic Broadband GaAs FET Amplifiers," Electronics Letters, Vol. 12, May 13, 1976, pp. 251- 252.
6. R. S. Pengelly and A. F. Podell, "MMIC CAD tools and workstations," 10th Annual IEEE GaAs IC Symposium, 1988, p. 325.
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8. P. N. Rigby, J. R. Suffolk, and R. S. Pengelly, "Broadband Monolithic Low-Noise Feedback Amplifiers," IEEE MTT-S International Microwave Symposium Digest, May 1983, pp. 41-45.
9. R. S. Pengelly, "Application of feedback techniques to the realization of hybrid and monolithic broadband low-noise-and-power GaAs FET amplifiers," Electronics Letters, Vol. 17, Oct. 15, 1981, pp. 798-799.
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11. C. Suckling, R. Pengelly and J. Cockrill, "S-band phase shifter using monolithic GaAs circuits," International IEEE Solid-State Circuits Conference, Vol. XXV, 1982, pp. 134-135.
12. R. S. Pengelly, "Transmit/receive module using GaAs ICs," Electronic Engineering, Vol. 56, No. 695, November 1984, pp. 141-144 and 149.
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