Wideband data-acquisition modules are needed for numerous emerging applications, from software-defined radios (SDRs) to real-time digital radar. System designers often point to the ideal of an antenna feeding a high-speed analog-to-digital converter (ADC). In reality, filtering frequency translation follow the antenna, while a buffer or track-and-hold (T/H) amplifier precedes the ADC. Since the ADC likes to "see" constant amplitude, a T/H amplifier capable of high linearity and high sampling rate is critical for high-performance applications.

The new HMC660LC4B T/H amplifier (see table) from Hittite Microwave Corp. (Chelmsford, MA) see sidebar> is designed to provide unparalleled linearity for wideband data-acquisition applications at high sampling rates. The HMC660LC4B is suitable for a wide range of applications, including in digital sampling oscilloscopes (DSOs) , SDRs, commercial and military radar systems, electronic-warfare (EW) systems, electronic intelligence (ELINT) systems, direct microwave/RF/intermediate-frequency (IF) sampling, microwave/RF/IF peak detection and power measurements, wideband spectrum analyzers, and RF/IF/fiber-optic test systems.

The HMC660LC4B (Fig. 1) is the first member of a new family of wideband T/H amplifiers, allowing designers to directly sample full-scale 1 Vpp signals with as much as 4.5 GHz input bandwidth. Based on SiGe BiCMOS technology, the device has been characterized for impressive 9-b T/H mode linearity for input signals from DC to 4 GHz and a clock rate of 2 GHz. The new T/H amplifier is supplied in a 4 x 4-mm surfacemount RoHS-compliant package. It can be used with high-speed ADCs to simplify the downconversion signal path in digital receivers. Since it is wideband and operates at high frequencies, the T/H amplifier allows designers to operate at higher IFs, eliminating mixers, bandpass filters, amplifiers, and local oscillators (LOs) to reduce complexity and increase reliability.

The HMC660LC4B employs a novel design topology that allows a significant improvement in the trade-off among bandwidth, linearity, and hold-mode feedthrough. The new topology also overcomes the problem of input width sensitivity to input signal level, which is common in other commercial T/H circuits. The HMC660LC4B's internal architecture comprises several key functions: input amplifiers to process the input signals and the clock signals, a T/H switching core, and an output amplifier. Differential input, clock, and output signals are part of the architecture to minimize power supply, ground, and radiated noise.

Differential input signals are applied to the IN+ and IN terminals of the HMC660LC4B (Fig. 2) and fed through an on-chip bias tee, which provides a DC termination at 50 ohms and AC-couples these signals to the input amplifier. The input amplifier buffers the differential input signals that drive the T/H switch core. The clock input signals (CLK+ and CLK-) are similarly fed to an on-chip input bias tee that couples the signals to a clock driver; the clock driver provides the fast clock edges necessary for high-speed sampling at the T/H core. After sampling, the held signals are buffered through an output amplifier and appear as the differential output signals (OUT+ and OUT-), each of which is capable of driving a 50-ohm load.

The HMC660LC4B is designed to deliver clean output waveforms with minimal glitchesimportant for high-speed measurement applications investigating high-speed signal edges. (Fig. 3) below shows measured time-domain output waveforms for an HMC660LC4B displayed on a model TDS8000 sampling oscilloscope from Tektronix (www.tektronix.com). The input signal is approximately 1 Vpp with an input frequency of 3.125 GHz, and the clock rate is 500 MSamples/s. The blue trace shows the HMC660LC4B in track mode, and the red trace shows the device in T/H (sampling) mode. The small ripples in the hold portion of the waveform are caused by reflections on the 2-ft. cable connection between the HMC660LC4B evaluation board and the oscilloscope. When used with an ADC, the T/H amplifier should be in close proximity to the ADC to minimize reflections.

(Fig. 4) below shows that the linearity of the HMC660LC4B is limited by second-order effects to about 61 dB (9.9 b) with an input signal of 0.5 Vpp (one-half full-scale) at 4 GHz, clocked at 1 GSamples/s. This linearity performance is significantly better than the closest competing T/H device, which is limited to typical linearity or spurious-free dynamic range (SFDR) of 32 db (5.05 b) with a 4 GHz, 0.5 Vpp input signal that is clocked at 1 GSamples/s.

Another important feature of the HMC660LC4B is that it exhibits proper linearity order dependence. This is particularly important for designers who are employing signal averaging using digital-signal-processing (DSP) techniques. Such users may perform averaging to reduce the wideband noise floor, and may choose to trade off input signal levels for higher linearity results. For example, using the HMC660LC4B with a one-half full-scale input signal level of 0.5 Vpp at 4 GHz (versus a 1 Vpp full-scale input signal at 4 GHz) and a clock rate of 1 GSamples/s, the linearity will improve by 6 dB from 55 dB to 61 dB. Similarly, starting with a full-scale input signal of 1 Vpp at 1 GHz, and a clock rate of 1 GSamples/s, the linearity will improve by 12 dB from 54.6 dB to 66.6 dB when the input signal is reduced to 0.5 Vpp at 1 GHz.

The HMC660LC4B T/H amplifier also exhibits sampling aperture jitter of less than 110 fs, and the hold-mode feedthrough rejection is better than 60 dB. The device exhibits a maximum time-domain noise value of 1.1 mV root mean square (RMS) integrated over the full 7-GHz output bandwidth. These specifications are essential for designers that are looking to optimize the capabilities of commercially available high speed ADCs. The HMC660LC4B may also be used as a subsampling front-end for lower-speed, recently available 12-b, 300-to-400-MSamples/s ADC modules. Adding the HMC660LC4B T/H amplifier to a lower-bandwidth ADC allows the ADC to subsample a fairly broadband signal (for example, signals with 1-GHz bandwidth centered at 3.5 GHz) and then directly convert (alias) it to baseband frequency for conversion by a lower-speed, high-resolution ADC.

The HMC660LC4B's combination of wide bandwidth, high linearity, and excellent isolation provides a unique solution for high-speed ADCs for wideband digital receivers and other systems. It facilitates direct conversion from RF or high-IF signals, eliminating intermediate mixers, amplifiers, filters, and local oscillators to reduce system size, power, and complexity. To facilitate characterization, the company offers the T/H amplifier on an evaluation board complete with power supply lines and coaxial connectors for interconnection to commercial test equipment.

Hittite Microwave Corp., 20 Alpha Rd., Chelmsford, MA 01824; (978) 250-3343, FAX: (978) 250-3373, Internet: www.hittite.com.