Designers of monolithic microwave integrated circuits (MMICs) require powerful modeling tools to avoid excessive design iterations. One of the most powerful MMIC design tools, the Advanced Design System (ADS) from Agilent Technologies, has just been upgraded as ADS 2003A, with expanded capabilities and flexibility. Demonstrated for the first time at the Wireless Systems Design Conference & Expo (San Jose, CA), ADS 2003A incorporates new models and design kits, verification capabilities, file manipulation capabilities, and improved schematic creation and layout-modification functions.

ADS 2003A offers an improved design flow for MMIC developers. New semiconductor models, for example, include the third generation of the TriQuint-only transistor model (TOM3), a TriQuint-modified Materka transistor model, and an Angelov Chalmers device model. The software suite features foundry support for a wide range of facilities, including TriQuint (Hillsboro, OR), TRW (Redondo Beach, CA), and Vitesse Semiconductor (Camarillo, CA).

The Advanced Model Composer in ADS 2003A allows designers to create arbitrary user-defined parameterized shapes (including matching networks), a wide range of passive components including spiral inductors, metal-insulator-metal (MIM) capacitors, and thin-film resistors, or draw from a large library of microstrip and stripline structures and components. Parameterized models are created with the Momentum planar electromagnetic (EM) simulator as the modeling source.

ADS 2003A features new schematic circuit-design capabilities, with new DesignGuides for wireless-local-area-networks (WLANs) and time-duplex, spatial-code-division-multiple-access (TD-SCDMA) systems. It also includes applications for use with load-pull impedance-tuner systems from Focus Microwaves (Dollard-des-Oreamux, Quebec, Canada) and Maury Microwaves (Ontario, CA), Smith-Chart-based impedance-matching tools, and a new transistor-biasing tool.

A new layout feature, called "Edit-in-place," allows designers to edit the subnetwork of a larger design while working from a top-level layout diagram. The effects of changes on the subnetwork can be seen while viewing the surrounding design artwork. Agilent Technologies, 1400 Fountaingrove Pkwy., Santa Rosa, CA 95403; (707) 577-4631, FAX: (707) 577-5260, Internet: www.agilent.com/find/eesof.