Fixture De-embedding Techniques for 28 Gb/s Transmitter Measurements

Sponsored by: Agilent Technologies

    Date & Time

  • This webinar is now available On-Demand.
  • Please complete the registration.

    Event Type

  • On-Demand Webinar


Hosted By:

Presented By:


Rob Sleigh
Product Marketing Engineer
Agilent Technologies

Presented By:


Heidi Barnes
Senior Application Engineer
Agilent EEsof EDA


Jack Carrel
Application Engineer



Why This Webcast is Important:
Gone are the days when IC pins were accessible and when bit rates were low enough that the probe loading was negligible. Today’s high density BGA packages and multi-gigabit/s data rates present twin challenges to signal integrity engineers who want to measure the eye diagram at the IC solder bump. In this webcast we will demonstrate a proven method. You will learn how to design a 28Gb/s fixture channel and the additional test structures that enable fixture de-embedding and extraction of PCB material properties for the creation of measurement based models. You will see how to apply a hybrid combination of a 2x through path Automatic Fixture Removal and measurement based simulation methods that let you characterize and model cables, connectors, and PCB traces. We’ll show you how to use these behavioral models to perform virtual probing at the solder bump of the Xilinx Virtex 7 28Gb/s SERDES transmitter by implementing real-time fixture de-embedding during DCA sampling oscilloscope measurements.

Who should view this webcast:
Signal Integrity Engineers, High Frequency Measurement Engineers, AMI model developers.

Webinar Registration

Sponsored Introduction Continue on to (or wait seconds) ×