Software Speeds Design Verification

Sept. 3, 2009
Version 3.2 of the PureTime design verification software from Real Intent includes two new features, PureTime Constraints and PureTime Exceptions. The constraints feature helps users verify timing issues at the circuit and system levels. The exceptions ...

Version 3.2 of the PureTime design verification software from Real Intent includes two new features, PureTime Constraints and PureTime Exceptions. The constraints feature helps users verify timing issues at the circuit and system levels. The exceptions feature checks for false and multi-cycle timing exceptions. The software is written to fit into larger electronic-design-automation (EDA) platforms and provides a host of validation and verification tools with generous debugging capabilities. Prakash Narain, President and CEO at Real Intent, notes that "Ensuring the correctness of design constraints and timing exceptions is critical for design and verification teams. The new functionalities added in PureTime 3.2 represent a significant technological enhancement of the product."

About the Author

Jack Browne | Technical Contributor

Jack Browne, Technical Contributor, has worked in technical publishing for over 30 years. He managed the content and production of three technical journals while at the American Institute of Physics, including Medical Physics and the Journal of Vacuum Science & Technology. He has been a Publisher and Editor for Penton Media, started the firm’s Wireless Symposium & Exhibition trade show in 1993, and currently serves as Technical Contributor for that company's Microwaves & RF magazine. Browne, who holds a BS in Mathematics from City College of New York and BA degrees in English and Philosophy from Fordham University, is a member of the IEEE.

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