Aviation systems are shrinking in size and weight, with or without pilots, requiring embedded computing systems that are also smaller and lighter but without sacrificing processing power. Fortunately, SRC, Inc. has a history of developing compact computing solutions capable of meeting modern requirements for intelligence, surveillance, and reconnaissance (ISR) missions.
The firm’s Agile Condor technology is designed within a pod-based architecture to fit the needs of remotely piloted aircraft. Developed for the U.S. Air Force Research Lab (AFRL) in Rome, N.Y., the scalable, low-cost, small size, weight, and power (SWaP) computing hardware architecture is a good match for embedded-computing systems in remotely piloted vehicles. Having delivered the first Agile Condor system two years early, SRC continues to enhance the embedded computing system’s capabilities.
The pod-based embedded computer system includes an external pod enclosure and an internal chassis protecting commercial-off-the-shelf (COTS) single-board computers (SBCs). The pod also contains additional computing hardware, such as graphical processing units (GPUs), field-programmable gate arrays (FPGAs), and solid-state memory units. The pod enclosure is based on a flight-certified design modified to use ambient air cooling for thermal management of the embedded electronics. The chassis-mounted hardware for the initial Agile Condor system delivers more than 7.5 TF computing power with power efficiency of better than 15 GF/W. The flexible COTS architecture can be upgraded quickly and easily when system updates are needed.
“The delivery of this first system helps advance the intelligence, surveillance and reconnaissance capabilities of our Air Force, providing our national leaders and warfighters with significant technical, tactical, and situational-awareness advantages far beyond the present capabilities,” said Paul Tremont, SRC’s president and CEO. “We remain strong in our commitment to provide warfighters with increased actionable intelligence by pushing the boundaries of HPEC and bringing data processing and analysis capabilities closer to the edge.”
