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The lack of integration between EDA products contributed to a poor design flow, the process of moving a design from concept to realization. Generally, the design flow consisted of an electrical design, which was turned over to a layout technician, who then created an IC or hybrid layout in graphics software. At that point, a problem in the design was often discovered (such as a component or circuit structure that didn’t fit the layout) and redesign was necessary. It was not unusual to have several design iterations through layout and circuit simulation before a design was complete. This process was slow, error-prone, and expensive.

The fundamental problem was that most EDA products were “point tools”: individual software products that performed a single type of analysis, such as circuit simulation, electromagnetic (EM) analysis, system simulation, or layout. Much of an engineer’s design time was spent operating these disparate tools and shuffling data back and forth between them, and it was difficult to identify, for example, a layout problem or an EM simulation error early in the design cycle. The obvious solution was to integrate point tools so that layout, EM analysis, and system simulation could be performed concurrently with the electrical design.

Early attempts to integrate EDA products involved creating a “framework,” a supervisory program that operated all the products and moved data between them. Because of the great differences between the point tools, however, the results were often clumsy, technically limited, and buggy. Much of that clumsiness was the inevitable result of the need to integrate products that had never been intended to work together.

The best way to ensure interoperability is for those products to be designed together from the start. By the time the need for integration became critical, however, existing EDA products had become big and complex, and redesigning them was a job too large for the makers to contemplate. New products began with a clean slate, however, and achieved much smoother integration. Additionally, new technologies, such as object-oriented design and Microsoft’s Component Object Model (COM) technology, allowed greater versatility and interoperability between software modules. This assured the greater integration and interoperability that is the hallmark of modern software design.

Modern Design Flow

In the past, the computational speed of EDA software was essentially viewed as the single characteristic of interest. That is easy to understand, as the limitations of both computers and software systems meant that many kinds of analyses, especially EM simulations, were painfully slow. As computer and software capabilities improved, however, it became clear that the design-flow bottleneck was the dominant factor in development time. Accordingly, it affected not only the cost of design but the time to market. As the RF/microwave world moved more toward commercial products and away from government and military development, long time–to-market costs meant lost opportunities. The cost of that loss was far greater than the direct costs of circuit and system development.

Achievement of a faster design process does not involve the mindless pursuit of software processing speed; it results from smoothing the design flow. This, in turn, requires attention to the software design of the entire system, not just the software simulator tools. The goal is to perform electrical design, EM design, and layout concurrently, so that iterations between all of these functions can be avoided. This capability smooths the design flow enormously and decreases costs dramatically.

A number of different simulation system characteristics contribute to the effectiveness of a modern design flow, including accurate EM models, tight integration between EM and circuit simulators, tight integration with system simulators, layout and circuit interoperability, and advanced graphics capabilities. EM simulators, as invaluable as they can be, still have a strong impact on the time needed to complete a design. The use of even a high-speed EM simulator for for every microstrip step and T-junction is a waste of time. It makes more sense to analyze such structures beforehand, store the results in tables of data, and interpolate them when needed.

Evaluate EDA Software For A Wireless World, Fig. 2

Discontinuity models realized in this manner, containing a database of EM results, are fast and accurate. Figure 2 shows the S11 response of a large step junction plus microstrip interconnects using an EM model and a full EM simulation. It’s clear that the EM model is insignificantly different from the full EM simulation, diverging only at frequencies where the 25-mil alumina substrate would be inappropriate anyway (because of spurious modes).

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