1. This schematic diagram shows the architecture of the broadband, low-noise amplifier.
The LNA circuit cascode is formed by E-pHEMTs J27 and J31. Amplifier gain is set by resistor R126 in the source of transistor J31 and load resistor RL in the drain of device J27. For modeling purposes, source resistor RS is used to connect to the gate of transistor J31. The signal at the source of J31 consists of an attenuated version of VIN plus random noise and harmonic distortion.
Resistors R129 and R139 form a broadband 50-⦠voltage divider, with the output of R129/(R129 + R139) = 1/gm + R126, where gm is the transconductance of J31. The output of the voltage divider is connected to resistor R135, one of the input resistors at the positive input port of the error amplifier. This amplifier, X38, is a high-speed op amp with ultralow 1/f noise. It has gain of 6, which is set by the ratio of resistor R136 to R134 and the ratio of resistor R137 to R135.
Transconductance
Bipolar transistor Q8 forms a low-noise transconductance amplifier that drives the source of the common gate of transistor J27 in the cascode. The voltage of the differential error amplifier is applied to the transconductance amplifier to develop an error current that is summed at the source of transistor J27. Passive components L18, C16, and R141 provide isolation for the transconductance amplifier from the cascode, as well as produce a 100-⦠termination at high frequencies for the error amplifier. The transconductance of the error amplifier is set to a first-order value of 14.12 mmho, or 1/70.8 â¦. This is referred to as RGAIN. Inductor L18 has a very high resonant frequency, in the gigahertz range, and provides isolation between the cascode and error amplifier.
In the LNA, Q11 is a bipolar transistor current source that provides an offset dc current to the summing node of the error amplifier, with the offset current set by resistor R155 and a dc supply of +9.5 V dc, VOFFSET2. Capacitor C21 provides a high-frequency ac ground to the emitter of Q11, and resistor R156 provides a high-frequency 50-⦠termination to the base of Q11.
Node VREF contains an attenuated signal, VIN, at the gate of J31, which serves as the reference signal for the error amplifier. The second input signal to the error amplifier is from the emitter of J31, which contains an attenuated version of VIN plus an error signal. The error term consists of harmonic distortion plus random noise.