GaN Devices Arm Distributed Amplifier

Feb. 13, 2008
Many military applications can benefit from a 10-W GaN-based distributed power amplifier developed for broadband applications from 20 to 2000 MHz.

Broadband, high-efficiency power amplifiers serve a wide range of military applications in present and future communications and navigation systems. But amplifier designers are limited in performance by the active devices available to them. Fortunately, the growing availability of wide-bandgap semiconductor devices, such as silicon carbide (SiC) and gallium nitride (GaN) transistors, is clearing the way for broadband, high-efficiency power amplifiers (PAs) capable of serving multiple electronic systems. Several distributed power-amplifier prototypes at power levels from 10 to 40 W have been developed recently at Rockwell Collins based on GaN pseudomorphic-high-electronmobility- transistor (pHEMT) devices. What follows are the results of designing and testing a 10-W distributed GaN power amplifier with maximum power output of more than +40 dBm and a poweradded efficiency of 30 to 70 percent over the bandwidth of 20 to 2000 MHz.

Both military and commercial high-frequency electronics designers have recognized the potential of wide-bandgap device technologies for broadband, high-power amplifiers. In particular, GaN HEMT devices offer capabilities that should fit well in future high-performance amplifiers from UHF through Q-band frequencies. Many electronic warfare (EW) applications require high-power, high-efficiency amplifiers that cover frequency bands from VHF through L-band.

Most of the amplifiers used in these applications are currently narrowband designs, with multiple units required to cover the required bandwidth and number of waveforms. Development of a broadband power amplifier with a frequency span wide enough to serve more than one waveform could potentially reduce the cost and size of the system. In addition, the increasing use of software-definedradio (SDR) architectures in tactical radio systems has prompted a need for "common building blocks," such as linear broadband amplifiers capable of handling multiple waveforms as created under software control.

Broadband power performance can be achieved with a negativefeedback approach or a distributed amplifier approach. Negative feedback amplifiers can achieve decade bandwidth performance, but with limited efficiency. Distributed RF power amplifiers feature broadband performance and low sensitivity to circuit and device tolerances, leading to their widespread use in wideband communications systems for many years. Distributed amplifiers are capable of greater than a decade of bandwidth. Such a broadband amplifier, with 9 dB gain and +/-1 dB gain flatness from 1 to 13 GHz was realized in monolithic form on GaAs substrate in the early 1980s.1 A 2-to-20-GHz GaAs distributed power amplifier with 30 dB gain has also been demonstrated.2 However, most early work on distributed power amplifiers was focused on achieving high gain versus frequency rather than high efficiency. Those early amplifiers were not designed for high power output or high efficiency.

In contrast, recently a novel approach using drain-line tapering methods achieved power-added efficiencies greater than 50 percent with a distributed amplifier architecture, while still preserving the low VSWR and broadband characteristics of distributed amplifiers. Also, distributed amplifiers capable of 1 to 6 W output power using discrete LDMOS or GaAs HEMT devices were realized using low-temperature-cofired-ceramic (LTCC) substrates.3,4 However, the maximum power output was limited by the operating voltage of the active devices. Fortunately, the recent development of GaN HEMT technology has provided a tremendous opportunity for RF designers to develop high-power, high-efficiency broadband power amplifiers.

In conventional amplifiers, the gainbandwidth product is proportional to the ratio of the FET transconductance, gm, and the input capacitance, Cin. Placing multiple FETs in parallel will not increase the gain-bandwidth product. A distributed amplifier overcomes this obstacle to wide bandwidth by adding the individual transconductance values of multiple FETs without adding their input and output capacitances, and defeats the limitations of finite gain-bandwidth product by absorbing the parasitic capacitances into the transmission lines. Figure 1 shows the basic topology of a conventional distributed power amplifier and its simplified equivalent circuit. In this circuit, microstrip lines are periodically loaded with the complex gate and drain impedances of the transistors, forming lossy transmission-line structures. In this simplified model, the forward and reverse gains are given by:

where

Gpf = the forward power gain;

Ggb= the reverse power gain;

gm = the transconductance of the active devices;

l = the electrical length of each unit;

Zod,og = the characteristic impedances of the artificial transmission lines;

g,d = the phase constants over each unit length; and

N = the number of cells that forms the transmission lines.

See associated figure

Continue to page 2

Page Title

In this design, RF signals at the input of the gateline travel down the line to the other end and are absorbed by the terminating impedance. However, along the way, a significant portion of the signal is dissipated by the gate circuits of the individual FETs. The input signal sampled by the gate circuits at different phases (and generally at different amplitudes) is transferred to the drain line through the FET transconductance. If the phase velocity of the signal at the drain line is identical to the phase velocity of the gate line, then the signals on the drain line will add in phase. The forward power gain becomes frequency independent, i.e., has a theoretically infinite bandwidth. On the other hand, the reverse gain is low because of the mismatched phase shift among the cells. Addition will be in phase only for the forward-traveling signal. Any signal that travels backward, and is not quite canceled by the out-of-phase additions, will be absorbed by the complex drain impedance.

In practice, unfortunately, the number of FETs in a distributed power amplifier is not unlimited because of the lossy transmission line. Typically, the number of the cells in practical distributed power-amplifier designs ranges from three to six. The upper cut-off frequency is inversely proportional to the input capacitance. Because of the high power density of GaN HEMT devices, designers can use smaller periphery transistor devices suited to broadband, high-frequency requirements while still generating high output-power levels.6

When designing a distributed amplifier, there are several choices for substrate materials; three substrate platforms under investigation at Rockwell Collins for military applications are listed in the table. The simplest and quickest way to test and evaluate a distributed power amplifier design is to build the circuit on a singlelayer microwave printed circuit board (PCB), such as RO3000 series material from Rogers Corp. (www.rogerscorp.com). The discrete transistors are wirebonded to the metal pads that connect microstrip patterns and surfacemounted passive components on the surface. The advantage of using this approach is low fabrication cost and quick turnaround time. The approach also provides high-power-handling capabilities. However, for medium- to high-production volumes, the PCB platform may not have the same reproducibility and repeatability as the other two approaches.

For higher integration, laminated substrates, such as low-temperatureco- fired-ceramic (LTCC) materials, allow some of the passive components, such as capacitors and inductors, to be integrated onto the substrate. Monolithic microwave integrated circuits (MMIC) technology offers the highest level of integration and the smallest form factor. MMIC technology typically provides better high-frequency performance by reducing parasitic circuit elements and provides enhanced reproducibility as a result of uniform processing and integration of all circuit elements. For medium-to-large-scale production volumes, MMIC technology may also offer some cost advantages. For smallsignal applications, MMIC technology is definitely the design option of choice. However, for high-power applications, especially for output-power levels above 20 W, the MMIC format may not always be the optimum choice. The core structures in distributed amplifier designs are the inductors or microstrip that form the virtual transmission lines. For example, for the 20 W power amplifier design, assuming 30-percent efficiency and a supply voltage of +28 VDC, the average drain current is about 2.4 A at the maximum power level. The typical current density of the metal layer in a MMIC is about 15 mA/m, so the width of the metal trace must be wider than 158 m to achieve good reliability.

There are two problems associated with such a wide conductive trace. First, the spiral inductors in the distributed amplifier become very large, resulting in relatively large MMICs for high-power applications. Second, the wide conductive line increases the parasitic capacitance of the microstrip line, while increasing RF signal losses.

In order to achieve first-pass design success and shorten the development cycle, extensive circuit and electromagnetic (EM) simulations were performed throughout the design phase. Circuit simulations were performed with the Advaced Design System (ADS) suite of software tools from Agilent Technologies (www.agilent.com). In the initial phase of the design, a simplified linear model was used to define the initial values of the main design parameters, such as the inductor (L) and capacitor (C) values for the artificial transmission lines. Then, a nonlinear device model is used for harmonic-balance simulation to achieve a better understanding of the design's nonlinear behavior. For large-signal simulation of the GaN HEMT devices from Nitronex (www.nitronex.com) used in the distributed amplifier, a scalable nonlinear FET model developed for Rockwell Collins by famed model maker Walter Curtice7 was used. Initially, the power amplifier design was realized using the passive component models in ADS. For the final design optimization, fullscale EM simulation of the substrate with microstrip lines and land pads for surface-mount-technology (SMT) components was performed and the results were fed back into the ADS simulation. Simulation results matched closely with measured results.

The 10-W, four-cell design shown in Fig. 2 uses four discrete GaN-onsilicon HEMTs from Nitronex on RO3003 soft-board substrate material from Rogers Corp. Each FET cell is s discrete GaN-on-Si HEMT with 2-mm periphery and 0.5-m gate length. The substrate material is a PTFE/ceramic laminate with dielectric constant of 3.0. The single-layer substrate is 30 mils thick and features 0.5-oz. copper laminated on both sides. There are no embedded passive components in this design. All DC bias circuitry, including RF choke and DC blocking capacitors, are mounted on the top surface along with the microstrip lines. The transmission lines, along with the parasitic circuit elements of the transistors, form the input and output impedance matching networks. The gate series capacitors and resistors, and drain shunt capacitors, are SMT components. The distributed power amplifier module is designed with 50-ohm direct match into the system input and output connections. Four GaN-on-Si HEMT devices are glued on the copper carrier using hightemperature thermal conductive paste to maximize thermal performance. See associated figure

Figure 3 shows the small-signal characteristics of a four-cell, 10-W GaN-on-silicon distributed power amplifier module operating with quiescent bias current of 100 mA at +28 VDC drain voltage. S-parameter measurements were performed from 10 MHz to 4 GHz using a model N5230A vector network analyzer from Agilent Technologies. Results show excellent MHz (Fig. 5). Below that frequency, fixed-frequency attenuators and more narrowband solutions can be applied for applications requiring higher accuracy.

Specifying a cost-effective attenuator system for highpower testing and other high-power applications does not require custom products, long lead times, multiple vendors, and high non-recurring-engineering (NRE) costs. Time, cost, and space can be saved by using standard offthe- shelf products that are properly matched together. The table offers an example of how standard models can be typically used in a 1-5/8-in. attenuator system that is geared for very high power levels through 1 GHz.

Sponsored Recommendations

Free Poster: Power Electronics Design and Testing

Dec. 23, 2024
Get with this poster a guidance about usual converter types, most important measurements and general requirements for power electronics design and testing. Register for a download...

eGuide: Optimizing and Testing RF Power Amplifier Designs

Dec. 23, 2024
This eGuide explores electronic design automation to real RF devices, focusing on verification, characterization, repeatability, and throughput, while highlighting key steps from...

Free Poster: Wireless Communications Standards

Dec. 23, 2024
Get insights about the latest cellular, non-cellular, IoT and GNSS specifications including 5G, LTE and Wi-Fi. Sign up to receive your poster in the mail or via download.

5G NR Testing – Are You Ready for the 5G Challenges?

Dec. 23, 2024
5G NR deployment is accelerating, unlocking new use cases, applications, and opportunities for devices and infrastructure. The question is: are you prepared for these advancements...