AT 60 GHZ, A NUMBER OF POWER AMPLIFIERS (PAs) in CMOS have boasted output power to +16 dBm. Yet their power-added efficiency (PAE) was less than 15 percent. Recently, a 60-GHz wideband PA was reported with PAE above 20 percent for all applied VDD values. This development was the work of Alexandre Siligaris, Christopher Mounet, and Pierre Vincent from France's CEA, LETI, MINATEC together with Christine Raynaud from CEA, LETI, MINATEC and STMicroelectronics, Baudouin Martineau from STMicroelectronics, Nicolas Deparis and Nathalie Rolland from France's IEMN-UMR, and Yasuhiro Hamada and Muneo Fukaishi from NEC Corp.
The PA is based on two cascode stages. The input, output, and interstage matching use coplanar- waveguide (CPW) transmission lines. From a 1.8-V supply, the PA achieves output saturation power of +14.5 dBm, +12.7 dBm output power at 1-dB compression, and peak PAE of 25 percent. See "A 60 GHz Power Amplifier with 14.5 dBm Saturation Power and 25% Peak PAE in CMOS 65 nm SOI," IEEE Journal of Solid-State Circuits, July 2010, p. 1286.
