2. Two transmitters, two receivers, and two observation receivers populate the ADRV9009 transceiver.
Fractional-N phased-lock-loop (PLL) frequency synthesizers are incorporated into the ADRV9009, too, as is a clock synthesizer that generates the clocks needed for the converters, digital circuits, and serial interface. And with the previously mentioned LO synchronization feature, the LOs on multiple ADRV9009 chips can be phase-synchronized to support beamforming applications.
The ADRV9009’s maximum receiver bandwidth is 200 MHz, and its maximum transmitter synthesis bandwidth is 450 MHz. Maximum observation receiver bandwidth is 450 MHz. Furthermore, the ADRV9009 utilizes a 12-Gb/s JESD204B interface.
For frequency-division-duplex (FDD) applications, ADI offers the ADRV9008-1 and ADRV9008-2. The ADRV9008-1 is an integrated dual receiver, while the ADRV9008-2 is an integrated dual transmitter and observation receiver. Together, these two devices form what ADI describes as a two-chip FDD solution.
The ADRV9008-1 has a maximum receiver bandwidth of 200 MHz. The ADRV9008-2 has a maximum transmitter synthesis bandwidth of 450 MHz and a maximum observation receiver bandwidth of 450 MHz. Both are also equipped with the LO synchronization feature, and utilize a 12-Gb/s JESD204B interface.
ADI offers various resources for its RadioVerse line, such as evaluation kits and software tools. For more information, visit www.analog.com/radioverse.