Oscillators have changed substantially since they were first developed in the early 1900s. When MEMS-based oscillators came on the scene in the early 2000s, the pace of innovation accelerated dramatically. One of the biggest transformations has surrounded the flexibility and scope of programmable timing features available, along with the resulting benefits.
MEMS oscillators are complete timing systems based on a programmable architecture. Because all aspects of the timing system are included—resonator, oscillator sustaining circuit, phase-locked loop (PLL), temperature compensation, on-chip power-supply regulators, and filters—an extremely large and flexible portfolio of programmable features can be offered to customers.
By contrast, many quartz suppliers (but not all) are merely systems integrators rather than technology developers. For example, a quartz supplier might procure the quartz ingots from one supplier, the ceramic package from Kyocera or Sumitomo, the oscillator circuit from AKM or Cypress, and merely assemble and test the components developed by other companies.
By contrast, MEMS oscillator vendors usually develop all of the subcomponents of the complete oscillator solution in house and can therefore offer more innovative and programmable oscillator solutions. The table shows many of the features available when using a programmable timing system.
A wide range of programmable MEMS timing options exist.
Optimized System Performance
MEMS oscillators have several programmable features that improve system performance, including options for frequency output and waveform tuning. Starting with customizable frequency, designers can optimize performance by selecting the best output frequency for their application, which can be programmed from 1 Hz to 725 MHz, and out to 6 decimal places of accuracy. For applications that require voltage-controlled crystal oscillators (VCXOs) or digitally controlled crystal oscillators (DCXOs), MEMS oscillators have programmable pull range from ±6.25 parts per million (ppm) to thousands of ppm to support integration into control loops, including discrete jitter attenuator loops.
The pull-range flexibility of MEMS timing devices is created by using a fractional PLL rather than pulling the resonator itself with variable capacitive loading, as is done for most quartz-based VCXOs. Because of the limited quartz resonator pull range, quartz VCXOs are usually limited to a maximum absolute pull range (APR) of ±50 to ±100 ppm. The limited pull range of quartz devices reduces the applications they are able to support because a ±50-ppm VCXO, for example, would not be able to track an Ethernet clock in which frequency can be within ±100 ppm, as specified in IEEE 802.3.
Another programmable-oscillator application is dynamic frequency control. In-system programmable (ISP) oscillators can be used to boost computer performance through overclocking by slightly increasing frequency, or conversely, the frequency can be throttled back to lower system power during idle or low load conditions. Processors and memory systems can usually accommodate reference clock-frequency variation on the order of a few percent, making this dynamic frequency control an excellent means to throttle the clock frequency depending on processing load.
Communications systems usually have frequency tolerance specified in ppm rather than percentage, but they can benefit from higher than nominal frequencies, too. In Ethernet networks, it’s desirable in some situations to bias the average frequency higher to improve overall system performance and minimize the probability of buffer overflow and dropped frames.
The Ethernet standard requires a frequency accuracy of ±100 ppm. If ±100-ppm oscillators are used to build system boards, the oscillators will meet the Ethernet standard. Over a large production run, the Ethernet ports will span the frequency range from −100 to +100 ppm with a mean frequency of 0 ppm, as one expects when purchasing large numbers of ±100-ppm oscillators.
To bias the average frequency higher and improve overall performance while minimizing dropped frames due to buffer overflow/underflow, “spiked” oscillators are available. Spiked oscillators have the average frequency centered at some offset, usually +25 ppm or +50 ppm, above the nominal frequency. This means the quartz blank needs to be cut with this frequency offset, which may impact availability and price. And higher frequency spikes mean that the frequency-versus-temperature tolerance and aging specifications must be tighter so that the +100-ppm Ethernet specification is not exceeded.
For example, 156.25 MHz is a common oscillator frequency for 10-Gb Ethernet. A +50-ppm variant of this oscillator means the oscillators ship with an average frequency of 156.25 MHz + 50 ppm, which equals 156.2578125 MHz. The maximum allowable variation over temperature aging and other factors would need to be ±50 ppm to not exceed the +100-ppm Ethernet specification. Therefore, such oscillators would range from 0 to 100 ppm with a mean value of +50 ppm (156.2578125 MHz).
To allow for some margin to the +100-ppm Ethernet limit, oscillators spiked +50 ppm usually have a total stability specification of ±25 ppm. In this case, the highest frequency over a large population of devices would be +75 ppm (50 + 25) and the lowest frequency would be +25 ppm (50 − 25).
With the higher precision and lower aging of MEMS oscillators along with the programmable PLL technology, this frequency-spiking concept can be taken to the next level. Because a good MEMS temperature-compensated crystal oscillator (TCXO) has a total stability over 20 years of less than ±5 ppm, the center frequency could be set to +90 ppm. This would allow for a frequency range over a large population of devices of +85 ppm to +95 ppm (leaving 5 ppm of margin to +100 ppm).
Figure 1 compares frequency spiking of a quartz oscillator versus a MEMS Elite Platform Super-TCXO. Note that the MEMS TCXO frequency scale uses a zoomed-in view relative to the quartz oscillator (XO) scale. In this comparison, the average quartz frequency is +50 ppm versus the average MEMS TCXO frequency of +90 ppm. Thus, using the MEMS TCXO delivered an 80% improvement. And this improvement from the MEMS TCXO does not require a different resonator, but merely programming the PLL to the +90-ppm center frequency.
1. The frequency spiking of a quartz oscillator is compared to a MEMS Elite Platform Super-TCXO.
To learn more about the advantages of digital control, check out SiTime’s application notes entitled “I2C/SPI Programmable Oscillators” and “Improved System Performance with Digital Frequency Tuning in Precision Super-TCXOs.”
Reducing EMI
Programmable features can also reduce radiated clock emissions, which result in electromagnetic interference (EMI). For example, FlexEdge is a programmable feature for reducing EMI by increasing the rise and fall time of the clock waveform, which decreases the drive strength. FlexEdge effectively attenuates the clock’s power at higher-order harmonics and is especially effective for mitigating EM sourced from the clock trace. It has little to no impact on short-term jitter such as cycle-to-cycle jitter.
The impact of rise/fall time adjustment on harmonic power can be seen in Figure 2, which shows the oscilloscope waveform, and in Figure 3, which illustrates the impact of the slower rise/fall time in the frequency domain as measured on a spectrum analyzer. In Figure 3, the 19th-harmonic of the slower rise/fall time waveform had 24.4 dB lower power than the 19th-harmonic from the faster rise/fall time waveform.
2. Shown are oscilloscope waveforms of LVCMOS and FlexEdge outputs.
3. Slower rise/fall times can positively affect harmonic power.
Spread-spectrum clocking is another programmable-oscillator feature used to reduce EMI. This is particularly helpful in mitigating EM at the system level, reducing power peaks in the frequency domain of fundamental and harmonic components of the clock signal. Designers can use both spread-spectrum clocking and FlexEdge in combination to combat EMI, lowering noise by up to 17 dB on the fundamental frequency and 24 dB on the harmonics.
Figure 4 demonstrates the spectrum impact of a fixed-frequency clock (red color trace) versus a clock with triangular spread-spectrum modulation (blue). As shown, the peak power of the carrier frequency was reduced by 17 dB by using spread-spectrum modulation.
4. Depicted is the spectrum impact of a fixed-frequency clock (red color trace) versus a clock with triangular spread-spectrum modulation (blue).
These programmable emissions-reducing features come with a range of options. For example, the SiT9005 oscillator from SiTime has eight configurable FlexEdge settings, with slew rates from 0.25 to 40 ns, plus a wide spread range up to 4.0% peak-to-peak through two spread profile options: triangular or Hershey kiss. This type of flexibility is especially useful during the final stages of design when needing to pass compliance tests. Because MEMS oscillators come in several industry-standard footprints, they can be used as drop-in replacements for quartz oscillators without any printed-circuit-board (PCB) layout changes or use of bulky mechanical shielding.
Lowering Power Consumption
Reducing power consumption continues to be increasingly important, and programmable timing features help in this capacity as well. As mentioned, MEMS oscillators have programmable frequency. Because the frequency of SiTime MEMS oscillators can be programmed down to 1 Hz, it’s possible to drop the output load current to the lower end of the MCU/IC operating frequency range to reduce power consumption (power dissipation is proportional to C × V2 × F, where C is capacitance, V is the supply voltage, and F is frequency).
For example, reducing the output frequency from 2 MHz to 500 kHz decreases the unloaded operating current by about 70%. In contrast, quartz crystals are physically larger at lower frequencies, so quartz devices with frequencies less than 32.768 kHz are very uncommon.
Programmable NanoDrive is another power-saving feature available in low-frequency (1 Hz to 32 kHz) MEMS oscillators. With NanoDrive, the output and associated voltage swing can be programmed to match the downstream MCU or PMIC, from full LVCMOS (rail-to-rail) all the way down to an output swing of just 200 mV, significantly lowering current draw. Using lower-frequency MEMS oscillators in combination with low supply voltage and NanoDrive output is a potent combination for reducing power.
Flexible, Programmable Timing Systems
The frequency output, waveform tuning, EMI reduction, and power-reducing features mentioned can be used with other configurable features that impact performance. For example, a range of frequency-stability, supply-voltage, and output options are available with MEMS oscillators. These programmable features are usable in any combination within the device’s broad operating range to meet the specification needs of the system. In summary, the programmable architecture of MEMS oscillators creates a flexible timing solution that can improve system performance in multiple ways.
Jim Holbrook is director of customer engineering at SiTime Corp.
