SPI Raises The Bar On DSP Performance

May 23, 2007
Fabless semiconductor house Stream Processors, Inc. (SPI) specializes in parallel-processing architectures for digital signal processors (DSPs), such as their new Storm-1(TM) SP16HP. The software-programmable DSP achieves 112 billion multiplications ...

Fabless semiconductor house Stream Processors, Inc. (SPI) specializes in parallel-processing architectures for digital signal processors (DSPs), such as their new Storm-1(TM) SP16HP. The software-programmable DSP achieves 112 billion multiplications and accumulations per second (GMACs/s) for 16-b operation and 448 billion operations per second (GOPS) for 8-b operation. Designed as a cost-effective C-language-programmable alternative to multiple-DSP designs and field-programmable gate arrays (FPGAs), the SP16HP employs a single-core programming model to avoid the synchronization issues associated with multiple-core processors. The new DSP is priced at $149 each in 10,000 quantities.

Stream Processors, Inc. (SPI) (www.streamprocessors.com)

About the Author

Jack Browne | Technical Contributor

Jack Browne, Technical Contributor, has worked in technical publishing for over 30 years. He managed the content and production of three technical journals while at the American Institute of Physics, including Medical Physics and the Journal of Vacuum Science & Technology. He has been a Publisher and Editor for Penton Media, started the firm’s Wireless Symposium & Exhibition trade show in 1993, and currently serves as Technical Contributor for that company's Microwaves & RF magazine. Browne, who holds a BS in Mathematics from City College of New York and BA degrees in English and Philosophy from Fordham University, is a member of the IEEE.

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