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Developing Designs For RFID Transponders

Sept. 14, 2006
The design of a passive UHF RFID transponder involves a series of trade-offs between power requirements, complexity, and chip size in order to achieve desired performance.

Radio-frequency-identification (RFID) technology has expanded into a wide range of markets. It is particularly well suited to supply-chain management, due to the contact-less, non-line-of-sight nature of the technology. Passive RFID has been on the market at low (125 kHz) and higher (13.56 MHz) frequencies for some time, with various UHF RFID standards established prior to 2003. The Massachusetts Institute of Technology's Auto-ID Center (Cambridge, MA) recognized the problems of various proprietary RFID standards and realized that provincial protocols would impede the development and large-scale deployment of RFID technology. A single open standard was needed for an environment of interoperability and international regulatory compliance.1 These two values formed the backbone of what they proposed as the next generation of UHF RFID—the precursor to the Gen 2 standard. With a single worldwide specification in place, UHF RFID-based systems would become faster, easier to use, and less costly; more robust; and provide a multi-supplier path going forward. The Auto-ID Center kicked off the Gen 2 effort in June 2003 at a seminal meeting in Zurich, Switzerland. They would eventually transfer the responsibility for development and commercialization of the evolving standard to EPCglobal which, in December 2004, ratified the standard as "Generation-2 UHF RFID Protocol for Communications at 860 MHz -960 MHz."

Following ratification of this standard, UHF RFID integrated-circuit (IC) design activity has increased. But there are two major design constraints from an RFID IC design standpoint: power availability/bandwidth and transponder complexity.

The requirements for the UHF Industrial, Scientific, and Medical (ISM) band currently vary widely in major countries in terms of allocated spectrum, bandwidth, and radiated power, which is often stated as effective isotropic radiated power (EIRP). According to the EPCGlobal regulatory status report for UHF spectrum,2 the permitting operating frequency range is the 100-MHz bandwidth from 860 to 960 MHz, with acceptable power levels to 4 W. The UHF ISM band requirements for the three different regions are as follows. For North America, the operating band is 902 to 928 MHz with 4 W maximum EIRP. For Europe, the operating band is 865 to 868 MHz with 2 W maximum-EIRP. In Japan, the operating band is 952 to 954 MHz with 4 W maximum EIRP.

Transponder complexity is another design constraint. A transponder's read range depends on the minimum turn-on power (threshold power) for the RF IC chip (tag). In a UHF RFID system, passive back-scattering is often used in the backward link, from the tag to the reader. The read range is often set by the forward link, the communication from the reader to the tag, through the radiated power available at the tag. This is because backscattered signal strength accessible at the reader RF front end is on the order of -25 to -65 dBm.

Selecting the right technology to fabricate an RFID transponder IC with the right requirements is also a challenge. To meet the low-power requirements, a Schottky point-contact diode with low turn-on voltage, low junction capacitance, and high current drivability is often desired. Since Schottky contacts are not part of a standard silicon CMOS semiconductor process, research has pursued fabricating Schottky contacts using standard (low-cost) digital bulk CMOS processes. Other efforts have involved more expensive processes, such as silicon BiCMOS, which offers additional high-speed bipolar-junction-transistor (BJT) devices, and silicon-over-insulator (SOI) technology, which offers excellent low power performance. What follows is a review of the RF circuit techniques needed to design a basic UHF RFID transponder, including critical modules such as the rectifier, modulator/ demodulator, and the digital block.

A UHF RFID transponder (Fig. 1) is comprised of four building blocks: rectifier, modulator, demodulator, and digital circuits that handle the logic-level protocol and memory function.3 In a passive RFID system, the power supply is extracted from the incoming interrogating wave. Since power is scarce, it is important that transponder power consumption be kept to a minimum.

A passive RFID transponder uses rectifier circuits to convert the coupled electromagnetic power to the DC power supply needed for the chip. Parameters that characterize rectifier circuit performance include the input impedance, Zin or the chip's quality factor (Q), the chip operating power, Pin, and the voltage level, Vin. The rectifier circuitry must also convert incident RF energy to DC energy with the highest possible efficiency (η). A circuit designer must also consider achieving the highest possible output voltage level and input impedance in addition to maintaining high conversion efficiency.4 Two commonly use structures are an ordinary full-wave rectifier and a Dickson charge pump.

The full-wave rectifier is very common, using a two-diode cascaded structure. There are variants on this structure, including those based on NMOS and PMOS switches. In principal, a fullwave rectifier has good power efficiency. However, it requires that the input voltage level exceed 3 VTH so that the chip can reach the desired output voltage. As a result, the working range of a full-wave rectifier circuit is limited for UHF RFID applications unless it is supplemented by a high-radiation-resistance antenna and very high-Q matching network to boost the incident voltage level. The antenna design is a topic for a separate article and will not be covered here. Matching networks normally have achievable Qs of order of 10 only.

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An alternative structure for UHF RFID rectifier circuitry is the Dickson charge pump (Fig. 2).5 It is employed mostly in nonvolatile memory to achieve the high programming voltage required in electronically erasable programmable read-only memory (EEPROM) circuits. Since most RFID chips also contain nonvolatile memory, a designer can reuse the circuit topology to implement the high-voltage generation circuitry, saving development time in the process.

The simplified equation of Dickson structure is shown in Eq. 1:

where:

Vp,RF = the amplitude of the incoming RF signal and

Vf,D = the forward voltage drop across the diode.

A Dickson charge pump can be built using almost any semiconductor device, although Schottky diodes6 and low-threshold-voltage (VTH MOSFETs7 yield the best results. The circuit requires very little input voltage, and the designer can choose the desired output voltage and input impedance by manipulating the number of stages (N). However, power conversion efficiency is low due to the large number of rectifying devices, leakage, and parasitic elements.

The RFID modulator transmits transponder data back to the RFID interrogator or reader. Backscatter modulation is used exclusively in UHF RFID systems. In the EPC Gen2 protocol,8 two modulation schemes are specified: ASK and PSK. In ASK, two impedance states (in which only pure resistance is changed—either open, short, or two nonzero resistances) are switched between two antenna pins. A user can select either state to represent digital logic 1 or 0.9 In PSK, there are also two impedance states being manipulated, but only imaginary components are switched. To toggle between two imaginary reactance values, designers often use large MOSFET or varactor devices with voltage-dependent capacitances.

In a UHF RFID chip implementation, the impedance seen by the antenna can be represented as a resistance in parallel with a reactance (Fig. 3) .10 Assuming an antenna with minimum scattering, the amplitude of the backscattered power has the expression:

where:

PEIRP = the effective isotropic radiated power;

RA = the antenna resistance;

R = the chip resistance; and

Ae = the effective radar-cross-section (RCS) area.

In the case of ASK modulation, the impedance seen by the antenna is real (X >> R) and is modulated by the data signal between two values, R1 and R2. It is sufficient to choose:

R1 X R2 = R2A to have equal impedance mismatch in both states. In such a condition in both states, the same power is transferred from the antenna to the load. Assuming R2> R1, in order to modulate the resistance seen by the antenna, it is possible to use a switch, driven by the data signal, to connect a resistance RMOD in parallel with the input resistance (R2) of the transponder in such a way that R1 = R2||RMOD. When resistance RMOD is not connected, the antenna sees a resistance R2 and all the power PIN2 transferred from the antenna to the load can be used to supply the transponder. When resistance RMOD is connected, the antenna sees a resistance R1, and only a fraction of the power PIN1 transferred from the antenna to the load can be used to supply the transponder, while the remaining part is dissipated on the resistance RMOD. When PIN2 and PIN1 are equal, R1 = R2. From a design standpoint, it can be concluded that under ASK scheme, it is not possible to achieve a constant power supply to the tag IC. The corresponding equations are:

where:

PAV = the average power and

Ae = the effective RCS area.

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In PSK modulation, R = RA in order to make the transponder close to a matched condition, while imaginary component X is modulated with the data signal. The phase of backscattered signal, θ, is given by:

If X is modulated symmetrically with respect to zero, so does , which implies that the input power PIN to the transponder remains constant during modulation and is given by:

Most PSK modulators allow modulation of the output capacitance with the input signal. The changing reactance component in the transponder is often chosen as capacitive as it is more area efficient in an IC and high Q can be achieved. Compared to the inductive elements in IC fabrication technology, the Q is low while consuming little area. In a transponder front end, the matching network (an inductive element) is used to resonate with the mean value of the capacitance seen from the output of the modulator when the input signal is varying and therefore:

where:

C1 = the output capacitance of the modulator when the input signal is 1 and

C2 = the output capacitance of the modulator when the input signal is 0.

The average reactance (X) seen by the antenna, which consists of the differential capacitance component, is given by:

In both ASK and PSK implementations, the choice of modulation will affect the input impedance of the chip, the bit-error-rate (BER) performance, and the input power of the transponder, which is the most critical limiting factor for operating range. Therefore, PSK is usually preferred to ASK due to having a constant power supply to the transponder, although ASK has the advantage of smaller area and frequencyindependency.10

The demodulator serves to demodulate digital data embedded in the RF carrier. Since cost and real estate are major concerns, expensive coherent/ super-heterodyne detection is generally not considered. Amplitude-modulation (AM/ASK)-compatible schemes (DSBASK, SSB-ASK, and PR-ASK) are the de facto choices of interrogator-tag modulation schemes as specified in EPC Gen2 protocol.8 The analog elements needed to decode an ASK-compatible signal is similar, an envelope detector and comparator. Some systems uses pulse-width modulation (PWM); therefore, besides using an envelop detector, the demodulator in these systems must measure the incoming pulse width and distinguish the digital 1s and 0s embedded in the signal using a pulse-width discriminator, or the digital block must differentiate pulses based on different coding used.

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ASK involves the simplest form of RF detection, using a basic envelope detector, implemented using a diode-capacitor network. An ASK demodulator demodulate information in the form of amplitude changes or "dips." The demodulator is actually an edge detector. PSK is not used in an RFID system's forward link because PSK demodulation employs superheterodyne detection, which calls for a local-oscillator (LO), mixer. and filter circuits. Such circuits are complex and require large die area.

The working principle of a demodulator is as follows. The input carrier waveform is passed through a rectifier and envelop detector to extract the envelope. A lowpass filter after the envelope detector is used to screen the carrier ripple noise residue. The signal is then fed to a hysteresis comparator to generate the output. Three factors must be considered during edge-detection design: the lowpass filter, the hysteresis level of the comparator, and comparator sensitivity. The RFID reader determines the lowpass filter parameters during the tagging of the data rate, coding, and the envelope mask. The filter bandwidth should be smaller than the signal bandwidth. Specifications for the data envelope are described in the RFID air interface protocol.

The comparator must meet performance specified by the UHF RFID transponder demodulator. The dynamic range of the transponder's input voltage level should be around several hundred millivolts to several volts depending on different physical locations. The signal after the envelope detector and the lowpass filter should be in the same magnitude range. The comparator's specified performance includes the comparator's common-mode input level and differential-mode input level stated in percentage of common-mode input.

Another important comparator parameter is hysteresis level. When analog input signals are moving slowly or contain noise, the comparator outputs may oscillate at the input near the threshold point. Hysteresis is used to minimize oscillation during output transitions. However, a higher hysteresis level also means degraded sensitivity and a slow transition speed.

The digital control module handles interrogating commands, executes the anti-collision protocol, performs the data integrity check, runs memory read-write operations, and performs output control and data flow. The EPC Gen2 standard has a sophisticated command set, requiring the use of a complex digital core. Depending on a user's requirement, nonvolatile memory storage is needed if full Class 1 (both read/write) capability is implemented.

Interrogators manage tag populations using the three basic operations. Each of these operations comprises one or more commands. The operations are defined as follows:8

  1. The select process is the means by which an interrogator selects an RFID tag population for inventory and access. Interrogators may use one or more Select commands to select a particular tag population prior to inventory.
  2. The inventory process is the means by which an interrogator identifies different tags.
    An interrogator begins an inventory-round by transmitting a Query command in one of four sessions. One or more RFID tags may reply. The interrogator detects a single tag reply and requests the PC, EPC, and CRC-16 from the tag. An inventory round operates in one and only one session at a time.
  3. The access process is the means by which an interrogator transacts with (reads from or writes to) individual tags. An individual tag must be uniquely identified prior to access. Access comprises multiple commands, some of which employ one-time pad-based cover coding of the R => T link.

Corresponding to the reader command, a tag will transmit its internal state into one of the seven responses: Ready, Arbitrate, Reply, Acknowledged, Open, Secured, or Killed. A tag is able to support as many as four simultaneous sessions, which allows a tag to associate a separate and inventoried flag to each reader present in the environment. This flag will allow different readers to share a common population of tags, through time-division sharing. Two-way collision detection and elimination control is handled by the interrogator and the tag. In any inventory round, an interrogator will first issue a Query command. Once received, the tag will load a 15-b random-number-generated (RNG) code internally into its slot counter. If the loaded RNG is zero, the tag will reply to the interrogator by backscattering its own code back to interrogator. If the loaded RNG is nonzero, it will hold and remain silent. The reader will then issue another QueryRep to the tag population. Once received, the tag will decrease its slot counter and reply if the value turns zero. If no collision is detected after issuing Query or QueryRep commands, the interrogator will issue an ACK (acknowledge) command back to the tag. An ACK command received by the tag will transform into an Acknowledged state, which is ready for a further command. The interrogator will record the tag that has been successfully queried. If after replying a tag did not receive an ACK command from the reader, it will return to an Arbitrate state and decrease its slot counter value. The collision control mechanism basically depends on the RNG loaded into the slot counter. Since the possibility of replying to the interrogator is 215, different tags will be able to share the communication link via time-division interleaving.

Tag memory is separated into four distinct banks, each of which may comprise zero or more memory words (Fig. 4) :

  1. Reserved memory that contains the kill and access passwords.
  2. EPC memory that contains a CRC-16, protocol-control (PC) bits, and electronic product code (EPC) that identifies the object to which the tag is or will be attached.
  3. TID memory that contains an 8-b ISO/IEC 15963 allocation class identifier which is for an interrogator to uniquely identify the custom commands and/or optional features that a tag supports.
  4. User memory that allows user-specific data storage. The memory organization is user-defined.

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The logical addressing of all memory-banks begins at zero (00h). The physical memory map is vendor-specific.

In the EPC Gen2 protocol, tag designer-have the freedom to choose amplitude-shift-keying (ASK) or phase-shift-keying (PSK) backscatter modulation, and the interrogator (reader) must be able to decode either type. Besides choosing the modulation type, outgoing data must be encoded with either FM0 baseband or Miller modulation. The digital block should insert appropriate preamble sequences based on the encoding choice. The digital block must also include a decoder that can translate an incoming pulse train into valid commands.

From a circuit design point of view, a transponder's digital block eats up most of the power besides the rectifier, because this module contains memory, finite state machines, and input/ output (I/O) cells. It is essential to minimize the power usage of the digital portion in order to increase the transponder's operating range. A standard cell library is often used for synthesizing the transponder's digital block. Under some circumstances, manufacturers have developed custom cells to provide very low-power performance.

Memory elements in transponder are important. To implement Read/Write tags non-volatile memory (NVM) such as EEPROM and Flash is necessary. Availability of EEPROM or Flash in particular process will also limit its application in designing read/write tags. Dual poly process is a must if EEPROM and Flash NVM are needed. NVM option is heavily foundry dependent. The exception is to seek support from third-party companies that offer some special intellectual property (IP), which allows an NVM option on single poly technology (such as devices from Virage Logic).

The digital control block can be implemented using a hardwired method or a software-programmable method (with a microprogram or microcontroller). The hardwired method requires the smallest die area, in exchange of flexibility, with the need of redesign if the protocol changes. The programmable model requires much greater die size (15 times larger for microprogram approach and 60 times larger for the microcontroller approach) and significant initial design time. It offers the flexibility of making changes since the reconfiguration workload can be shifted to the software engineering level with higher abstraction ability.

One of the major design constraints for an RFID transponder is usually the power budget. A few tens of microwatts of power must be made available to the digital block. If the intended operating distance increases, then the power must also be increased. Another design constaint is the chip size. Usually, it is preferable to have the smallest IC possible. The various performance parameters in the digital block allow designers to make trade-offs among different design constraints, including architecture, logic styles, and optimized area-power consumption during synthesis.

In the simple RFID transponders covered so far, the most complex portions are the rectifier and the digital block, since these two sections are the most power hungry. Next month, this two-part article series on RFID transponders will conclude with a look at some more advanced transponder designs.

REFERENCES

  1. The Gen 2 Story: Charting the path to RFID that just works," available online at: http://www.impinj.com/files/MR_GP_ED_00001_Gen2Story.pdf
  2. EPCGlobal regulatory status report, available online http://www.epcglobalcanada.org/docs/RFIDatUHFRegulations20050720.pdf
  3. U. Karthaus and M. Fischer, "Fully integrated passive UHF RFID transponder IC with 16.7-uW minimum RF input power," IEEE Journal of Solid-State Circuits, Vol. No. 10, October 2003, pp. 1602-1608.
  4. Zheng Zhu, Ben Jamali, and Peter H.Cole, "Brief Comparison of Different Rectifier Structures for RFID Transponders," Auto-ID Labs Adelaide report, 2004.
  5. J.K. Dickson, "On-chip high voltage generation in NMOS integrated circuits using an improved voltage multiplier technique," IEEE Journal of Solid-State Circuits, Vol. SC-11, June 1976, pp. 374-378.
  6. W. Jeon, J. Melngailis, and R.W. Newcomb, "Passive RFID Transponder with Read-Only Memory for Low Cost Fabrication," Proceedings of IEEE Systems-On-Chip Conference, September 2005, Herndon, VA.
  7. Yuan Yao, Yin Shi, and F.F. Dai, "A novel low-power input-independent MOS AC/DC charge pump," IEEE International Symposium on Circuits and Systems 2005, 1, May 23-26, 2005, pp. 380-383.
  8. EPC Class 1 Generation 2 UHF Air Interface Protocol Standard Version 1.0.9.
  9. Zheng Zhu, RFID Analog Front End Design Tutorial version 0.0), Auto-ID Labs Adelaide report, 2004.
  10. G. De Vita and G. Iannaccone, "Design Criteria for RF Section of UHF and Microwave Passive RFID Transponders," IEEE Transactions on Microwave Theory Techniques, Vol. 53, September 2005, pp. 2978-2990.

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