Managing Multichannel Signal-Acquisition Data

However, current fully integrated solutions can be very expensive; they are based on proprietary architectures with slow evolution of higher-performance generations. Therefore, solution providers are introducing new signal-acquisition systems based on commercial-off-the-shelf (COTS) components, including modular digitizers with smaller form factors at lower costs than previous generations of analog-to-digital converters (ADCs). These newer, integrated digitizers include all required data processing.

To enable viable data streaming and recording, continuous signal acquisition and readout across multiple channels is required. In a standard acquisition and readout practices, the duration of the acquisition is limited by the internal buffer memory size of the digitizer. The readout of the data is performed after signal acquisition has stopped, with the signal acquisition data rate supported by the maximum speed allowed by the digitizer. This sequential approach to signal acquisition and readout operation is not suitable for aerospace and defense applications, however, where larger time windows are required for acquisition of signals related to potential threats (Fig. 1).

For defense and aerospace applications, a continuous and simultaneous approach to signal acquisition and readout is more suitable, where data readout is performed simultaneously to the signal acquisition. Incoming data from the signal acquisitions are stored in a continuous manner within a suitable memory storage device, using the application provided with the digitizer (Fig. 2).

In radar and other RF/microwave applications, the signal of interest is located at high frequencies that must be translated to a frequency range for signal processing and digitization inorder to perform analysis and display of the captured signal. Frequency downconversion is performed to shift incoming signals to an intermediate frequency (IF) that is within the sampling rate of available ADCs for effective signal processing in the digital realm.

A frequency downconverter allows conversion of a high-frequency signal around a center frequency (F_c) to a complex, lower-frequency baseband signal. Lowpass filters (LPFs) are used to remove unwanted signal content, such as harmonics and spurious signals, produced in the process of frequency downconversion (Fig. 3).

Threat signals, such as signals from a hostile radar system, are readily masked by a plethora of surrounding signals—including noise and harmonics from licensed broadcast systems—and extracting those signals for acquisition and analysis is a challenge for most signal acquisition systems. To improve signal detection in noisy RF environments, it is common to use multiple-input, multiple-output (MIMO) -type algorithms to detect signals from a given source across multiple antennas, so as to gain as much detail about the incoming signals as possible.

A multichannel system that can successfully perform complex measurements must meet certain requirements. In particular, phase coherency of measured signals is critical. This requires that all local oscillators (LOs) used for frequency downconversion within the system operate at the same frequency and phase. Also, all input signal paths must be tightly balanced in gain and phase.

A typical means of achieving LO phase coherency is by performing distribution of a single LO’s outputs to feed the multiple channels. This involves a complex calibration scheme to ensure that those divided signals remain tightly controlled in phase. Newer implementations of multichannel signal-acquisition systems employ multiple LOs locked in frequency and phase to a precision reference source.

Modular Solution

A complete signal-acquisition solution includes a modular digitizer and a standard host personal computer (PC) workstation with solid-state-drive (SSD) memory storage devices (Fig. 4). Such a system approach is based on three key elements: a wideband digitizer, a digital downconversion process, and simultaneous data-acquisition and read-out process. The digitizer must operate at high-speed sampling rates (typically in the GSamples/s range), with real-time processing capabilities and on-board field-programmable gate arrays (FPGAs) capable of implementing digital downconversion (DDC).

A multiple-circuit-board synchronization process is required to scale up the synchronization of the multiple signal-acquisition channels in such a system. It is enabled by two key factors: a common reference clock oscillator, with outputs distributed to each downconversion module to ensure synchronous clocking of each ADC channel, and a dedicated multiboard synchronization infrastructure that ensures phase coherency of each DDC LO. Phase coherency of the DDC LO is managed via a dedicated control FPGA. It allows system synchronization of all channel FPGAs located on a single module and the control FPGAs of all adjacent modules (Fig. 5).

An effective signal-acquisition system must allow selection of the decimated sampling rate, enabling reduction of the data volume to be streamed without losing any signal information. It should also provide the largest possible instantaneous bandwidth, free from unwanted spurious signal products, and continuous streaming without overflow. To reduce data volume, the acquisition data rate can be adapted to the target application by several mechanisms:

• downsampling, which allows reduction of the signal-acquisition sample rate by means of binary decimation;
• truncation and compression, which truncates signal samples on fewer digital bits and packs them continuously to reduce the total volume of data; and
• controlling the sampling frequency with an external clock source, which allows fine tuning of the incoming-signal sampling rate. To reduce data without impacting the signal quality, a compact sample size mode is implemented. When switching to this mode, the output data are further packed, allowing faster streaming.

The model M9703B high-speed digitizer/receiver from Keysight Technologies is an example of a commercial solution for wideband signal acquisition and data streaming. It is designed in the AXIe modular format and operates over a signal-acquisition range of DC to 2 GHz with eight channels sampling at rates to 3.2 GSamples/s with 12-b resolution.

Given the compact size of the AXIe format (with each M9703B digitizer fitting into a single AXIe card slot) and the capability of synchronizing as many as three of these M9703B modules, as many as 24 signal-acquisition channels can be achieved in a compact system architecture with full data streaming and recording capabilities (Fig. 6).

The digitizer/receiver features interleaving capability that allows two channels to be combined to achieve signal-acquisition rates at sampling rates of 3.2 GSamples/s across four channels and at instantaneous bandwidths as wide as 1.4 GHz. The M9703B contains generous on-board signal-acquisition memory and powerful real-time data-processing capabilities by merit of four Virtex 6 FPGAs from Xilinx.

The on-board FPGAs can be configured with an optional real-time wide-dynamic-range DDC that allows tuning and zooming on a signal to be analyzed. (More information on the model M9703B AXIe 12-b digitizer/receiver and DDC options CB1 and CB2 can be found here.)

Depending upon the requirements of an application, such as the instantaneous bandwidth and the number of channels, the data streaming configuration can be adjusted to optimize the data throughput and recording time to an SSD memory storage device. The maximum recording time depends on the following criteria: selected instantaneous bandwidth, standard mode or 12-b mode, digitizer sampling rate, number of channels, and data storage capabilities.

To show the capabilities of this modular signal-acquisition architecture, three different signal-acquisition system configurations were assembled based on the model M9703B wideband digitizer, an HP Z440 PC workstation from Hewlett-Packard Co., and multiple 8-TB SSD memory storage devices.

The first example was designed for the largest instantaneous bandwidth, 320 MHz. It achieves a signal-acquisition sampling rate of 1.6 GSamples/s and a data rate of 1.2 GSamples/s using 24-b mode. This performance was implemented with two AXIe card slots using two digitizers. The system achieves maximum data recording time of around two hours in single-channel mode and about one hour operating with two signal-acquisition channels.

To achieve maximum instantaneous bandwidth with the largest number of channels, the AXIe digitizer/receiver was configured with two modules for eight channels operating across an instantaneous bandwidth of 100 MHz. It functions with a signal-acquisition sampling rate of 1 GSamples/s and data rate of 350 MB/s. This configuration delivers maximum signal data recording time of about six hours in single-channel mode.

For a setup with the largest number of channels and a long recording time, three AXIe digitizer/receiver modules were combined to achieve 24 channels operating across an instantaneous bandwidth of 10 MHz and a signal-acquisition sampling rate of 1.6 GSamples/s. This compact three-module configuration runs at a data rate of 37.5 MB/s with maximum data recording time of more than 59 h in single-channel operation, and around 7.5 h per channel with eight channels in use.

These examples provide some insight into the relationships of bandwidth, sampling rate, memory size, and data recording time, as well as how continuous signal acquisition requires some “juggling” of system performance goals to achieve certain requirements, such as long data recording times. Fortunately, modern modular signal-acquisition instruments such as the M9703B provides a great deal of flexibility in system planning, without adding a great deal of size when capabilities must be added.

Jean-Luc Lehmann

Keysight Technologies, Inc., 1400 Fountaingrove Pkwy., Santa Rosa, CA 95403; (707) 577-2663

Looking for parts? Go to SourceESB.