SoCs Bring High-End RF Devices From Lab To Sofa

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Systems-on-a-chip (SoCs) are a complex blend of core processors and the peripherals normally found on an external printed-circuit board (PCB), which are integrated into a single chip or package. Modern SoCs contain a processor, memory, digital I/O block, power-management block, and even a radio. A few years ago, the integration of RF electronics in the form factor and price point enabled by SoCs was unattainable. As compact RF electronics are increasingly backed by powerful processors, however, RF devices like smart watches, glasses, sensors, phones, computers, and test equipment are hitting the market at a rapid rate (see figure).

Smart personal electronic devices (PEDs), smart media, and wireless backhaul are leading the consumer and industrial markets in driving SoC performance. The companies developing smart-PED SoCs are working hard to combine the highest core and video-processing capability to service advanced radio features, such as LTE-A and WiGig. Their goal is to deliver a power-efficient and compact supercomputer with ultra-fast connectivity. Qualcomm, Samsung, MediaTek, Apple, AMD, and Nvidia are all competing to produce high-end SoCs with the latest technology. These technologies include integrated graphics processing units (GPUs) and multicore central processing units (CPUs) to handle the advanced features of modern, smart PEDs. To succeed, they must optimize the graphics capability for high-resolution video/gaming, enable advanced radio functions, increase multi-tasking capability, and offer a smooth user interface (UI) while consuming minimal power. These goals are pushing the companies to add processor cores, integrate memory, and drop to lower processing nodes. The main driving forces for these developments are gaming as well as high-resolution video streaming, which powers other SoC markets as well.

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RF SoCs have the capability to drive the latest RF devices and high-throughput data while bringing anytime, anywhere multimedia experiences to consumers. (Courtesy of Blu Wireless Technology)

For developing smart-media devices, such as set-top boxes and automobile telematics, engineers are designing cost-effective media-streaming devices. Such devices can drive very-high-resolution, massive displays while enhancing the consumer experience using satellite and wireless connectivity. Entropic, Marvell, Broadcom, and STMicroelectronics offer SoCs for multimedia devices like set-top boxes. To lend automobiles a better multimedia experience, Renasas, STMicroelectronics, CSR, NEC, and Freescale offer infotainment and telematics SoCs. Like the smart-PED SoCs, telematics SoC solutions require high-performance CPUs and GPUs to meet the media display demands. Yet they also require sophisticated radio electronics to enable advanced position systems and more robust radio interfaces, which enhance connectivity reliability.

The need for high data rates for the multimedia, consumer, and commercial markets adds to the burden of modern communications systems while increasing the need for backhaul solutions. To satisfy wireless-backhaul and infrastructure needs, SoCs are being developed to drive as much throughput as possible. In doing so, they can hopefully meet the demands of the data-hungry consumer and business user. PMC-Sierra, Broadcom, Blu Wireless, and Infineon offer solutions for wireless-backhaul SoCs for mobile and satellite communications—some to 60 GHz. With digital sampling rates of wireless-communications technologies like WiGig hitting 2.64 GHz, even high-end SoC CPUs aren’t capable of meeting the necessary speeds. Wireless-backhaul engineers must therefore develop parallel processing methods and optimized parallel topologies to account for these high sampling rates using integrated SoC solutions.

Companies like Blu Wireless offer intellectual-property (IP) licensing on such topologies for this market. Other possibilities for solving this complex processing problem could be Nvidia’s Tegra K1 SoC, which offers its CUDA GPU computing—previously only desktop-capable—in a power- and space-efficient SoC package. Technologies that allow high-speed parallelization could help to satisfy the processing demands of high-frequency operation or advanced communications standards, such as carrier aggregation with LTE-A. Although there are many high-end SoC solutions, some companies offer RF SoCs with low-profile, customizable, or power-efficient radio capability.

RF SoC manufacturers like CEL, Broadcom, Anaren, Nordic, and Texas Instruments offer SoCs for low-profile and high-efficiency Bluetooth and ZigBee devices, which target the wearable device market. These designs must maintain a low-power system in a small footprint while offering highly sensitive receivers. Manufacturers also must provide easy-to-program design assistance for designers with minimal RF experience.

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Industrial Applications

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In the industrial arena, Echelon is pioneering communications SoCs so that the building industry can offer automation services with a united hardware standard. Its multi-protocol, ISO-FT 6050 SoC can support both the LonWorks and BACnet protocols over IP. With that SoC, the company hopes to enable building automation devices that promote the Industrial Internet of Things (IIoT). At the AHR Expo this January in New York, N.Y., OEM device customers of Echelon demonstrated products built around the framework for smart controls. Current-generation FT 6050 devices operate with digital communications. Yet future expansion to wireless topologies is possible, thanks to the enhanced integration capability of SoCs.

With all of the highly integrated digital, analog, and RF electronics that go into a modern SoC, engineers increasingly need electronic-design-automation (EDA) software and hardware test tools to simulate and test these complex devices. Developing SoCs is an in-depth process of designing, simulating, verifying, manufacturing, and testing a complex system with many core components in a very dense space. In the past, discrete chips were used for each of the core functions. With heightened integration, however, most of the core components are on the same die or within the same package. These integration steps add cost savings, reliability, yield, and time savings to the manufacturing process.

The extent of integration in modern SoCs also adds new development challenges. Some of the roadblocks in developing software for these designs are the computational power necessary to simulate a device with billions of transistors and billions of states, which operate in the analog, digital, and RF domain. Designing software to handle all of the complex realms of operation and iterations of the design process is an additional problem. Some companies provide an in-house design suite that is optimized for their particular process. Present solutions, like Microsemi’s Libero SoC, offer a complete SoC design suite for the firm’s field-programmable-gate-array (FPGA) product lines. Additionally, companies like Algotochip offer code-to-chip services for the digital domain. Because there is not a wide selection of complete and generic RF SoC design-to-test tools available, engineers must use a variety of different EDA tools in a design-flow process.

Cadence Virtuoso, Agilent Technologies GoldenGate, Mentor Graphics HyperLynx, AWR Microwave Office, Synopsys HSPICE, and Ansys DesignerRF all offer RF circuit simulation software with electromagnetic (EM) simulation engines. Other available tools that could aid the in the RF-SoC design process for simulation verification are MATLAB/SIMULINK, Spice, Verilog-AMS, VHDL-AMS, and SystemC. While some SoC designs are on a monolithic substrate, others consist of stacked die or packages. A design suite and EM simulator with 3D capability could be required for multi-dimensional designs. Reasonable consideration should be applied when deciding on a design flow with several software tools, as the optimization of the calibration and interfacing between the design tools could save cost and time in the design process.

The RF devices of even a few years ago comprised discrete components with externalized RF test ports. This allowed for relatively straightforward software verification and bench-level testing. RF SoCs are making the testing environment more complicated, as the real estate for test points on an IC could be limited. Complex packaging could lead to further complications. Often, probe stations are required for IC-level testing. Testing highly integrated devices in a manufacturing environment could slow down operational test, as the number of states skyrockets with device performance.

A proposed solution to RF SoC testing challenges is to use the internal technology available within the SoC to automate self-test operations. This would enable the built-in processors and sensor to run complex testing routines for functional self-test. Additional circuits could be added for pass/fail qualification testing internal to the chip. Although such an approach would increase the design complexity of the RF SoC, it has the potential to eliminate many testing steps during the verification and manufacturing stages. It could even prevent repetitive and costly quality-control checks.