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Digital-to-analog converters (DACs) have been used for many years to generate lower-frequency signals. However, they typically lacked the sampling speeds and precision needed for recreating RF/microwave signals with any form of moderately complex modulation—until, that is, the arrival of the 11-b AD9161 and 16-b AD9162 DACs from Analog Devices. Both are capable of direct RF signal synthesis at speeds of 6 Gsamples/s and more, and update rates of 12 Gsamples/s for crafting signals at frequencies to 7.5 GHz.
The AD9161 and AD9162 (Fig. 1) can easily produce wideband modulated signals for use in wireless infrastructure and DOCSIS 3.1 cable applications. Both DACs are based on a quad switch architecture that employs a 2× interpolator filter for update rates to 12 Gsamples/s in some modes. The interpolator filter also allows them to be configured for power-conserving lower data rates and clock speeds that simplify the filtering requirements.
The two DACs can construct waveforms in the second and third Nyquist zones at frequencies as high as 7.5 GHz while maintaining excellent dynamic range and low-noise performance. Both perform similarly in terms of signal generation, but the higher bit resolution of the AD9162 results in slightly less noise.
1. The AD9161 and AD9162 digital-to-analog converters (DACs) run at update rates as high as 12 Gsamples/s to generate outputs reaching 7.5 GHz.
DACs Deal with DOCSIS
These two high-speed DACs are designed to produce wide-dynamic-range signals for wireless infrastructure and single- and multiple-carrier data over cable service interface specification (DOCSIS) applications. For example, operating at a DAC frequency of 5 Gsamples/s, the AD9161 achieves a spurious-free dynamic range (SFDR) of –82 dBc for an output frequency of 70 MHz, –70 dBc for an output frequency of 2 GHz, and –55 dBc for an output frequency of 4 GHz. For DOCSIS applications at the same DAC frequency, the SFDR is –70 dBc for a single carrier at 70 MHz, –68 dBc for four carriers at 70 MHz, and –65 dBc for eight carriers at 70 MHz. At 950 MHz, the SFDR is –70 dBc for a single carrier, –68 dBc for four carriers, and –64 dBc for eight carriers.
The higher-resolution AD9162 DAC offers comparable SFDR performance in similar operating conditions, with SFDR of –82 dBc for an output frequency of 70 MHz, –70 dBc for an output frequency of 2 GHz, and –60 dBc for an output frequency of 4 GHz. For DOCSIS applications, the SFDR of the AD9162 is –70 dBc for a single carrier at 70 MHz, –70 dBc for four carriers at 70 MHz, and –67 dBc for eight carriers at 70 MHz. At 950 MHz, the SFDR is –70 dBc for a single carrier, –68 dBc for four carriers, and –64 dBc for eight carriers.
The adjacent-channel-power performance of the AD9161, for an output frequency of 877 MHz, is –76 dBc for one carrier and –75 dBc for two carriers, measured from the first adjacent channel. The AD9161’s intermodulation distortion (IMD), for a 0-dB full-scale (FS) signal at 900 MHz, is –75 dBc, rising to just –71 dBc for a 0-dB FS signal at 1800 MHz. Noise spectral density for a single tone is just –157 dBm/Hz at 550 MHz, –155 dBm/Hz at 960 MHz, and –155 dBm/Hz at 1990 MHz.
For the AD9162, adjacent-channel power for an output frequency of 877 MHz is –79 dBc for one carrier and –76 dBc for two carriers, measured from the first adjacent channel. The adjacent-channel power is –74 dBc for one carrier at 1987 MHz and –70 dBc for two carriers at 1990 MHz. IMD for the AD9162 is –80 dBc at 900 MHz and –68 dBc at 1800 MHz.
The single-tone noise spectral density is somewhat lower than that of the AD9161: –168 dBm/Hz at 550 MHz, –167 dBm/Hz at 960 MHz, and –164 dBm/Hz at 1990 MHz. For a DAC frequency of 4 Gsamples/s and output frequency of 3.8 GHz, the single-sideband (SSB) phase noise of the AD9162 is –119 dBc/Hz offset 1 kHz from the carrier, –125 dBc/Hz offset 10 kHz from the carrier, –135 dBc/Hz offset 100 kHz, and –144 dBc/Hz offset 1 MHz.
2. Different evaluation boards based on both DACs are available to simplify testing and applications development.
These fast DACs are well-suited for communications systems as well as for radar and test applications. The data interface of both DACs consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes, creating greater application flexibility. A serial peripheral interface (SPI) can be used to configure either DAC and monitor register status.
The converters come in 165-ball 8.0- × 8.0- × 0.5-mm CSP-BGA packages and 169-ball 11- × 11- × 0.8-mm CSP-BGAs, with a leaded ball option for the AD9162. The firm also offers several versions of evaluation boards for the DACs (Fig. 2). To ease testing, a wideband commercial balun is connected to the output of the DAC.
Analog Devices Inc., One Technology Way, P. O. Box 9106, Norwood, MA 02062-9106; (781) 329-4700, www.analog.com.
