Mwrf 1099 Semiconductors Circuits 0
Mwrf 1099 Semiconductors Circuits 0
Mwrf 1099 Semiconductors Circuits 0
Mwrf 1099 Semiconductors Circuits 0
Mwrf 1099 Semiconductors Circuits 0

2013 IEDM Surveys Device Developments

Oct. 31, 2013
The 2013 IEEE IEDM event will provide visitors with the opportunities to learn about the latest developments in all forms of semiconductor devices.
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Semiconductors are critical to many electronics applications, from managing DC power through millimeter-wave transmissions. Keeping up to date with the latest advances and technologies for semiconductors is no easy task, so small wonder that the annual IEEE International Electron Devices Meeting (IEDM) should be so well attended each year. The 2013 IEDM is scheduled for December 9-12 at the Washington Hilton hotel in Washington, DC. The conference features high-level technical presentations, as well as workshops and tutorial sessions on almost every technology of current interest to integrated-circuit (IC) developers—from DC through light.

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From its opening, plenary sessions, the 2013 IEDM will explore many important aspects of semiconductor technologies. Among these is an invited presentation on the possible future of graphene as a semiconductor building-block material by Andrea Ferrari of the University of Cambridge. As this talk will detail, graphene has many unique properties, with the possibility to support performance levels that are not possible with current semiconductor technologies. But adoption of graphene technology and fabrication techniques will require major investments in research and development and in processing equipment. This presentation will examine whether the performance capabilities of graphene will make it worth the investments required to embrace this new, disruptive technology.

Within the same opening plenary session, Geoffrey Yeap of Qualcomm will investigate the different mobile system-on-chip (SoC) applications that are currently driving different portions of the semiconductor industry. He will point to the expectations for over three billion third- (3G) and fourth-generation (4G) mobile wireless device connections—especially smartphones—and how SoC devices for these products are essential for industry growth. This presentation will project a potential 1000x increase in mobile data traffic from 2010 to 2020, and the need for mobile devices with the performance and features to support that growth, including always-on/always-aware connectivity and battery life that will provide days of active-use experience.

This report will highlight power efficiency and cost effectiveness as perhaps the two greatest challenges in providing future smart-phone wireless devices, and the design challenges will start with the mobile SoC architecture partition and optimization and the design and co-optimization of individual chips for the smartphones, including RF transceivers and memory devices capable of operating at lower power levels. The report will point out that cost and power reductions will be made possible by front-end integration of power amplifiers, antenna switches/tuners, and power envelope tracker through a cost-effective RF SoI design.

For additional information on graphene, S-J. Han and several other researchers from IBM’s Thomas J. Watson Research Center will report on a multiple-stage graphene-based IC using a novel fabrication method. Designed as an RF receiver front end, the circuit includes signal amplification, filtering, and frequency-downconversion mixing. All passive and active components are integrated within an area of only 0.6 x 0.6 mm on 200-mm silicon wafers. The device has been used to receive and restore digital text transmitted on a 4.3-GHz carrier signal, an important function in modern wireless-communications systems.

A somewhat offbeat presentation during the opening day of the 2013 IEDM looks at the place of electronics in DNA sequencing. The invited talk, by Jonathan Rothberg of Lifetech , reviews the importance of developing technology for reading or sequencing the chemical code of DNA as a biosensing technology and transferring such information onto a silicon CMOS chip. It is hoped that advances in CMOS will make possible a way to perform high-throughput DNA sequencing on a CMOS chip that could transform the use of DNA sequencing, enabling the growth of personalized medicine based on individual genome sequencing.

Within the same session, another invited presentation, by A. van den Berg of the Netherlands’ University of Twente, details the developments of miniaturized laboratories, referred to as “laboratories on a chip.” Background will be presented on diagnostic devices that have been used to measure ions in blood. The devices have been used to monitor lithium in a pricked finger of manic-depressive patients; calcium in blood for prevention of milk fever; and both creatinine in blood and sodium in urine for early detection of end-stage renal disease (ESRD). Another device was developed for analyzing male fertility by determining sperm concentration and motility in semen. These nanodevices are small enough to be embedded in pills for swallowing, and work within a patient’s body as small electronic laboratories, detecting potential problems within each patient.

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Stacking Scenarios

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IBM’s researchers made considerable contributions to the 2013 IEDM program, with Mukta Farooq of the firm’s Systems & Technology Group explaining its approach to three-dimensional (3D) chip stacking, and how individual chips can communicate with each other through electrical connections. The design approaches for stacking must consider ways to enhance chip performance by increasing bandwidth, reducing wire delay, and enabling better power management.

One technique is the use of through silicon vias (TSVs) to electrically interconnect the various chips in a stack. This report reviews different ways to introduce TSVs to the manufacturing sequence for stacked chips, with attention given such key details as the diameter of the TSV, its insulating and conducting materials, and the technology node. Once TSVs have been fabricated, the final device structure must be evaluated for thermo-mechanical integrity and reliability of TSV structures.

For those seeking to learn more about emerging semiconductor-related technologies, a diversified collection of tutorial sessions is available immediately preceding the formal opening of the 2013 IEDM, on Saturday, December 7th, in different rooms within the hotel. For example, T. Paul Chow of Rensselaer Polytechnic Institute (RPI) will review the interface properties for silicon-carbide (SiC) and gallium-nitride (GaN) semiconductors, both important because of their high-power capabilities. As he will point out, to optimize the performance of these high-power semiconductor materials, achieving interface state stability is vital for reliable long-term operation.

Rob van Schaijk, R&D Manager for Sensors & Energy Harvesters at IMEC, will explore the emerging trend of self-powered electronic devices and pose various possible solutions for powering these devices. His session will compare vibrational, thermal, photovoltaic, and RF-based power-conversion methods, with a strong focus on vibration-based energy-harvesting methods—in particular, electrostatic and piezoelectric energy-harvesting techniques. He notes that the choice of energy-harvesting method depends upon the application.

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Modeling and simulation will also be covered in many presentations at the 2013 IEDM. For example, researchers at the Massachusetts Institute of Technology (MIT) share their work on a physics based model for high-voltage (HV) GaN high-electron-mobility-transistor (HEMT) devices. The geometry of the model is readily scalable and uses self-consistent expressions for current and charge behavior to analyze static and dynamic behaviors. Access regions are modeled as implicit-gate transistors. The physics-based model requires a relatively small number of parameters compared to other GaN models. The MIT Virtual Source GaN FET-High Voltage (MVS-G-HV) model, as it is known, has been validated against DC current-voltage (I-V) parameters, scattering (S) parameters, and breakdown and pulsed measurements of actual fabricated devices.

Admittedly, a great deal of the 2013 IEDM program is devoted to advances in memory and digital technologies. But as all of the preceding makes clear, there is also a large amount of content on RF/microwave-related semiconductor technologies, from circuits operating with low power consumption to those operating at millimeter-wave and optical wavelengths.

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