Cadence's Joules RTL Design Studio delivers up to 5X faster register-transfer-level convergence and up to 25% improved QoR through fast, accurate, and early physical insight and...
Established as the leading event for the design, engineering, and design automation community, the Design Automation Conference (DAC) highlights the latest developments in the...
The test and analysis GUI from OPENEDGES, code-named PHY Vision, serves as a comprehensive cockpit for visualizing and optimizing the performance of the DDR PHY.
The company's JSPICE software, used for 25 years in-house to make its own PLL and DLL IP, is now available through a beta test in advance of a commercial release.
The article shares some practical tips for dealing with issues like noise sensitivity and tight impedance margins when designing antennas for an RF PCB.
For high-speed, high-frequency PCB designs, laminate evaluation and selection are critical factors in achieving a manufacturable, operable, and reliable product.